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  • Lattice Sentry Root of Trust Demo for MachXO3D

    Demo

    Lattice Sentry Root of Trust Demo for MachXO3D

    A complete bitstream/firmware package which helps you demonstrate and test a NIST 800-193-compliant PFR solution on the Lattice Sentry Demo Board for MachXO3D
    Lattice Sentry Root of Trust Demo for MachXO3D
  • Key Phrase Detection

    Demo

    Key Phrase Detection

    Uses artificial intelligence (AI) to detect a specific key-phrase using a tiny, low-power iCE40 UltraPlus FPGA
    Key Phrase Detection
  • Lattice Image Signal Processing Demo

    Demo

    Lattice Image Signal Processing Demo

    Provides a complete ISP example design on the Lattice ECP5 FPGA for the Embedded Vision Development Kit, ideal for Industrial, Medical, and Automotive applications.
    Lattice Image Signal Processing Demo
  • Hand Gesture Detection

    Demo

    Hand Gesture Detection

    Uses artificial intelligence (AI) to implement hand gesture detection algorithm using a tiny, low-power iCE40 UltraPlus FPGA
    Hand Gesture Detection
  • Human Counting AI Demo

    Demo

    Human Counting AI Demo

    Human upper-body detection and counting demonstration utilizes Lattice’s ECP5 FPGA and a Convolutional Neural Network (CNN) acceleration engine
    Human Counting AI Demo
  • Human Face Detection AI Demo

    Demo

    Human Face Detection AI Demo

    Uses Lattice sensAI IP to detect human faces on a tiny, low-power iCE40 UltraPlus FPGA implementing AI at the edge. Adaptable to detect other objects.
    Human Face Detection AI Demo
  • Human Face Identification AI

    Demo

    Human Face Identification AI

    Register and identify faces without retraining, eliminating the need for uploading images and lengthy retraining using a GPU.
    Human Face Identification AI
  • Human Presence Detection AI Demo

    Demo

    Human Presence Detection AI Demo

    Uses an artificial intelligence (AI) algorithm to detect human presence with either the powerful ECP5 FPGA, or small, low-power iCE40 UltraPlus FPGA.
    Human Presence Detection AI Demo
  • Package Detection AI Demo

    Demo

    Package Detection AI Demo

    Uses Convolutional Neural Network (CNN) Accelerator IP on the ECP5 FPGA to detect packages. Output is shown via HDMI with a bounding box drawn around packages.
    Package Detection AI Demo
  • Speed Sign Detection AI Demo

    Demo

    Speed Sign Detection AI Demo

    Uses a Convolutional Neural Network in the ECP5 FPGA to detect speed limit signs and determine the indicated speed.
    Speed Sign Detection AI Demo
  • Vehicle Classification AI Demo

    Demo

    Vehicle Classification AI Demo

    Classifies vehicle types using a Convolutional Neural Network (CNN) Accelerator IP on the ECP5 FPGA. HDMI output uses color-coded bounding boxes.
    Vehicle Classification AI Demo
  • DisplayPort Receive Demo

    Demo

    DisplayPort Receive Demo

    Uses Bitec's DisplayPort IP core on the ECP5 FPGA in Lattice's Embedded Vision Development Kit. Compliant with DisplayPort 1.4a (including eDP 1.4 support).
    DisplayPort Receive Demo
  • DisplayPort Transmit Demo

    Demo

    DisplayPort Transmit Demo

    Uses Bitec's DisplayPort IP core on the ECP5 FPGA in Lattice's Embedded Vision Development Kit. Compliant with DisplayPort 1.4a (including eDP 1.4 support).
    DisplayPort Transmit Demo
  • Multi-Channel Motor Control with Predictive Maintenance

    Demo

    Multi-Channel Motor Control with Predictive Maintenance

    This design incorporates a RISC-V CPU and processing subsystem supporting multi-channel Motor Control with Predictive Maintenance.
    Multi-Channel Motor Control with Predictive Maintenance
  • Soft I2C Master and Slave – Simple Write and Read

    Demo

    Soft I2C Master and Slave – Simple Write and Read

    Demonstrates the operation of an I2C Master and Slave doing simple write and read of data.
    Soft I2C Master and Slave – Simple Write and Read
  • 3D Depth Mapping - SGBM Algorithm

    Demo

    3D Depth Mapping - SGBM Algorithm

    Determines the distance between an embedded device and an object using a Semi-Global Block Matching (SGBM) algorithm to determine 64 different disparity levels
    3D Depth Mapping - SGBM Algorithm
  • Power Sequencing with Fault Logging Demo

    Demo

    Power Sequencing with Fault Logging Demo

    Uses L-ASC10 to monitor, sequence four separate Power Planes from a central control point. Logs faults with timestamps. Expandable.
    Power Sequencing with Fault Logging Demo
  • Digital Front End (DFE) Demo

    Demo

    Digital Front End (DFE) Demo

    Lattice DFE (Digital Front End) demonstration utilizing of CPRI (Common Public Radio Interface), DUC (Digital Up Converter) and CFR (Crest Factor Reduction).
    Digital Front End (DFE) Demo
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