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  • Avant-E Evaluation Board

    Board

    Avant-E Evaluation Board

    The Avant-E Evaluation Board has the ability to expand the usability of the Avant-E FPGA with FMC HPC, PMOD, and Raspberry PI connectors.
    Avant-E 
    Lattice Avant, SPI Flash, LPDDR4, SERDES, GPIO, PMOD, FMC, Industrial Networking, SDR 
    Avant-E Evaluation Board
  • Object Classification Demonstration

    Demo

    Object Classification Demonstration

    This object classification demo provides a sample application for detecting, classifying, and tracking multiple objects running on CertusPro-NX FPGA.
    CertusPro-NX, Avant-E 
    Machine Learning/AI, Lattice sensAI, Object Detection, Object Identification, Space 
    Object Classification Demonstration
  • Object Classification Reference Design

    Reference Design

    Object Classification Reference Design

    The Object Classification reference design shows examples on implementing machine-learning based object classification to edge devices applications.
    CertusPro-NX, Avant-E, CrossLink-NX 
    Machine Learning/AI, Lattice sensAI, Object Detection, Object Identification, Space 
    Object Classification Reference Design
  • RISC-V MC CPU IP Core

    IP Core

    RISC-V MC CPU IP Core

    The Lattice RISC-V MC CPU soft IP contains a 32-bit RISC-V processor core and optional submodules – Timer and Programmable Interrupt Controller (PIC).
    MachXO3D, Certus-NX, CrossLink-NX, Avant-E 
    AHB-Lite, Soft Processor, RISC-V, Lattice Propel, TOR Switch, Defense, Automotive 
    RISC-V MC CPU IP Core
  • Advanced CNN Accelerator IP

    IP Core

    Advanced CNN Accelerator IP

    Calculates full layers of Neural Network including convolution layer, pooling layer, batch normalization layer, and fully connected layer.
    CrossLink-NX, CertusPro-NX, Avant-E 
    Machine Learning/AI, Lattice sensAI, Object Detection, Object Identification, Home Control Appliances & Security, IoT & Wearables 
    Advanced CNN Accelerator IP
  • Image Signal Processing IP Cores Suite

    IP Core

    Image Signal Processing IP Cores Suite

    The Lattice mVision ISP IP Core implements ISP pipelines for image quality enhancements in embedded designs based on Lattice FPGA devices.
    CrossLink-NX, Certus-NX, CertusPro-NX, Avant-E 
    AXI, AXI-Stream, AXI-Lite Interface, AWB, Camera, CCM, CFA Interpolation, Debayer, Image Processing, Image Signal Processing, Lattice mVision, RGB 
    Image Signal Processing IP Cores Suite
  • FreeRTOS

    IP Core

    FreeRTOS

    FreeRTOS software included in Lattice Propel 2022.1 for RISC-V embedded processor available with real-time kernel and set of libraries.
    Avant-E, MachXO5-NX, CertusPro-NX, Certus-NX, CrossLink-NX 
    Lattice Propel, RTOS, RISC-V 
  • CNN Plus Accelerator IP Core

    IP Core

    CNN Plus Accelerator IP Core

    CNN Plus IP is a flexible accelerator IP that simplifies implementation of Ultra-Low power AI by leveraging capabilities of Lattice FPGAs.
    CrossLink-NX, Certus-NX, CertusPro-NX, Avant-E 
    Machine Learning/AI, Lattice sensAI, AR / VR & Drones, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, UAVs, Automotive 
    CNN Plus Accelerator IP Core
  • Byte to Pixel Converter IP Core

    IP Core

    Byte to Pixel Converter IP Core

    Lattice Semiconductor Byte-to-Pixel Converter IP converts CSI-2/DSI standard based video payload packets from D-PHY Receiver Module output to pixel format
    CrossLink, CrossLinkPlus, CrossLink-NX, Certus-NX, CertusPro-NX, Avant-E, MachXO5-NX 
    MIPI, Modular MIPI/D-PHY, Parallel Video, Video Tx/Rx, Lattice mVision, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, Guidance Systems, Automotive, Space 
    Byte to Pixel Converter IP Core
  • CSI-2/DSI D-PHY Receiver IP Core

    IP Core

    CSI-2/DSI D-PHY Receiver IP Core

    Modular MIPI/D-PHY IP - PHY for receiving MIPI CSI-2/DSI Data for further processing. Supports up to 4 MIPI lanes to 10Gb/s
    CrossLink, CrossLinkPlus, CrossLink-NX, Certus-NX, CertusPro-NX, MachXO5-NX, Avant-E 
    CSI-2, DSI, MIPI, Modular MIPI/D-PHY, Video Tx/Rx, Lattice mVision, AR / VR & Drones, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, Automotive 
    CSI-2/DSI D-PHY Receiver IP Core
  • CSI-2/DSI D-PHY Transmitter IP Core

    IP Core

    CSI-2/DSI D-PHY Transmitter IP Core

    The CSI-2/DSI D-PHY Transmitter Submodule IP is for applications requiring D-PHY transmitter in the FPGA logic & supports both high-speed & low power modes
    CrossLink, CrossLinkPlus, CrossLink-NX, Certus-NX, CertusPro-NX, Avant-E, MachXO5-NX 
    CSI-2, DSI, MIPI, Modular MIPI/D-PHY, Video Tx/Rx, Lattice mVision, AR / VR & Drones, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, Guidance Systems, Automotive, Space 
    CSI-2/DSI D-PHY Transmitter IP Core
  • FPD-LINK Receiver

    IP Core

    FPD-LINK Receiver

    Modular MIPI/D-PHY IP - Converts FPD-LINK Video Streams to Pixel Clock Domain
    CrossLink, CrossLink-NX, Certus-NX, MachXO5-NX, Avant-E 
    LVDS Video, MIPI, Modular MIPI/D-PHY, Video Tx/Rx, Lattice mVision, Automotive 
    FPD-LINK Receiver
  • FPD-LINK Transmitter IP Core

    IP Core

    FPD-LINK Transmitter IP Core

    The FPD-LINK Transmitter Interface IP translates DSI video streams to LVDS interface for an FDP-Link connection to displays.
    CrossLink, CrossLinkPlus, CrossLink-NX, Certus-NX, Avant-E, MachXO5-NX 
    LVDS Video, MIPI, Modular MIPI/D-PHY, Video Tx/Rx, Lattice mVision, Automotive 
    FPD-LINK Transmitter IP Core
  • Pixel to Byte Converter IP Core

    IP Core

    Pixel to Byte Converter IP Core

    Converts one, two, four, six, eight, or ten pixels per pixel clock into MIPI D-PHY byte packet compatible format
    CrossLink, CrossLinkPlus, CrossLink-NX, Certus-NX, CertusPro-NX, Avant-E, MachXO5-NX 
    CSI-2, MIPI, Modular MIPI/D-PHY, Parallel Video, Video Tx/Rx, Lattice mVision, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, Guidance Systems, Automotive 
    Pixel to Byte Converter IP Core
  • SubLVDS Image Sensor Receiver IP Core

    IP Core

    SubLVDS Image Sensor Receiver IP Core

    The subLVDS interface is primarily used in image sensors, integrating one clock pair and one or more data pairs.
    CrossLink, CrossLinkPlus, CrossLink-NX, Certus-NX, CertusPro-NX, Avant-E, MachXO5-NX 
    LVDS Video, MIPI, Modular MIPI/D-PHY, Video Tx/Rx, Lattice mVision, Automotive 
    SubLVDS Image Sensor Receiver IP Core
  • MDIO Leader IP Core

    IP Core

    MDIO Leader IP Core

    MDIO LEADER IP features three different standard interfaces for accessing the control and status signals of Leader: APB, AHB-L and AXI-L.
    Avant-E, CertusPro-NX 
    Bus Controllers, Ethernet, IEEE 802.3, APB, AHB-L, AXI-Lite Interface 
    MDIO Leader IP Core
  • Memory Controller IP Core

    IP Core

    Memory Controller IP Core

    The Memory Controller IP reduces the effort required to integrate the LPDDR4 memory controller with the user application design.
    CertusPro-NX, Avant-E 
    LPDDR4, DDR SDRAM, APB, AHB, Memory Controller, Automotive 
    Memory Controller IP Core
  • SPI Flash Memory Controller IP Core

    IP Core

    SPI Flash Memory Controller IP Core

    The SPI Flash Memory Controller IP Core provides an industry-standard interface between a CPU and an off-chip SPI flash memory device.
    Avant-E, CertusPro-NX, Certus-NX, CrossLink-NX 
    SPI, SPI Flash, AHB-Lite, AHB, APB, Memory Controller, Automotive 
    SPI Flash Memory Controller IP Core
  • Watchdog Timer IP Core

    IP Core

    Watchdog Timer IP Core

    The Watchdog Timer IP Core is designed for use as an indicator that a corrective action is needed in response to a computer or a processor malfunction.
    Avant-E, CertusPro-NX, Certus-NX, CrossLink-NX, MachXO5-NX 
    Timer, Watchdog, Automotive 
    Watchdog Timer IP Core
  • Tri-Speed Ethernet MAC IP Core

    IP Core

    Tri-Speed Ethernet MAC IP Core

    The TSEMAC IP core have the logic, interfacing & clocking infra to ably integrate an external industry-standard Ethernet PHY with an internal processor
    ECP5 / ECP5-5G, LatticeECP3, LatticeECP2/M, LatticeXP2, LatticeSC/M, CrossLink-NX, Certus-NX, CertusPro-NX, MachXO5-NX, Avant-E 
    Connectivity IP Suite, Data Communication, Ethernet, Ethernet IP Suite, Value IP Suite, Defense, Automotive 
    Tri-Speed Ethernet MAC IP Core
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