Lattice Solutions

IP Core

Timer/Counter IP Core

The Lattice Semiconductor Timer/Counter IP is used to track timeouts in the system, and it generates an interrupt to the CPU when a timeout is detected.

Certus-NX, CrossLink-NX, Avant-E, Avant-G, Avant-X, CertusPro-NX, CrossLink, CrossLinkPlus, ECP5 / ECP5-5G, iCE40 LP/HX, iCE40 Ultra / UltraLite, iCE40 UltraPlus, LatticeECP2/M, LatticeECP3, LatticeSC/M, LatticeXP2, Mach-NX, MachXO, MachXO2, MachXO3, MachXO3D, MachXO5-NX, Certus-N2 

AMBA, Lattice Propel, Lattice Diamond, Lattice Radiant, APB, AHB-Lite, Lattice Sentry, Lattice Sentry PFR IP Package, Security 

IP Core

Helion IONOS Image Signal Processing IP Portfolio

Comprehensive, high-quality, highly-configurable ISP solution from Helion Vision, from basic to advanced High Dynamic Range Imaging (HDRI) color pipelines.

MachXO, LatticeXP2, LatticeECP3, CrossLink, ECP5 / ECP5-5G, CrossLink-NX 

HDR, Image Processing, Video Tx/Rx, Lattice mVision, Automotive 

IP Core

CSI-2/DSI D-PHY Receiver IP Core

Modular MIPI/D-PHY IP - PHY for receiving MIPI CSI-2/DSI Data for further processing. Supports up to 4 MIPI lanes to 10Gb/s

CrossLink, CrossLinkPlus, CrossLink-NX, Certus-NX, CertusPro-NX, MachXO5-NX, Avant-E, Avant-G, Avant-X, Certus-N2 

CSI-2, DSI, MIPI, Modular MIPI/D-PHY, Video Tx/Rx, Lattice mVision, AR / VR & Drones, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, Automotive, MIPI Bundle, Lattice Drive 

IP Core

CSI-2/DSI D-PHY Transmitter IP Core

The CSI-2/DSI D-PHY Transmitter Submodule IP is for applications requiring D-PHY transmitter in the FPGA logic & supports both high-speed & low power modes

Avant-E, Avant-G, Avant-X, CrossLink-NX, Certus-NX, CertusPro-NX, MachXO5-NX, Certus-N2, CrossLink, CrossLinkPlus 

CSI-2, DSI, MIPI, Modular MIPI/D-PHY, Video Tx/Rx, Lattice mVision, AR / VR & Drones, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, Guidance Systems, Automotive, Space, MIPI Bundle, Lattice Drive 

IP Core

OpenLDI/FPD-Link/LVDS Receiver IP Core

Modular MIPI/D-PHY IP - Converts FPD-LINK Video Streams to Pixel Clock Domain

Avant-E, Avant-G, Avant-X, CrossLink-NX, Certus-NX, CertusPro-NX, MachXO5-NX, Certus-N2, CrossLink, CrossLinkPlus 

LVDS Video, MIPI, Modular MIPI/D-PHY, Video Tx/Rx, Lattice mVision, Automotive, MIPI Bundle, Lattice Drive 

IP Core

OpenLDI/FPD-Link/LVDS Transmitter IP Core

The FPD-LINK Transmitter Interface IP translates DSI video streams to LVDS interface for an FDP-Link connection to displays.

Avant-E, Avant-G, Avant-X, CrossLink-NX, Certus-NX, CertusPro-NX, MachXO5-NX, Certus-N2, CrossLinkPlus, CrossLink 

LVDS Video, MIPI, Modular MIPI/D-PHY, Video Tx/Rx, Lattice mVision, Automotive, MIPI Bundle, Lattice Drive 

IP Core

DPC CCM – Color correction

DPC CCM is designed to reduce the difference between the spectral characteristics of an image sensor and the spectral response of the human eye.

ECP5 / ECP5-5G, CrossLink 

RISC-V, AXI, Image Processing, Video Tx/Rx, Embedded Ram 

IP Core

DPC Color Conversion

DPC Color Conversion allows real-time conversion of the RGB colour space into the YCbCr colour space.

ECP5 / ECP5-5G, CrossLink 

RISC-V, AXI, Image Processing, Video Tx/Rx, Embedded Ram 

IP Core

DPC Convolution 3x3

DPC Conv3x3 applies a kernel to a video stream, in real time, in order to obtain spatial filtering such as Sobel, Gaussian, Laplacian and more.

ECP5 / ECP5-5G, CrossLink 

RISC-V, AXI, Image Processing, Video Tx/Rx, Embedded Ram 

IP Core

DPC Debayer

DPC Debayer reconstructs RGB images, in real time, from RAW data captured by an image sensor.

ECP5 / ECP5-5G, CrossLink 

RISC-V, AXI, Image Processing, Video Tx/Rx, Embedded Ram 

IP Core

DPC Defective Pixel Correction

DPC Defective detects and corrects defective pixels in applications with a Bayer pattern image sensor.

ECP5 / ECP5-5G, CrossLink 

RISC-V, AXI, Image Processing, Video Tx/Rx, Embedded Ram 

IP Core

DPC Gamma RGB

DPC Gamma RGB is the IP dedicated to correcting, in real time, the gamma transformation curve of an incoming video stream.

ECP5 / ECP5-5G, CrossLink 

RISC-V, AXI, Image Processing, Video Tx/Rx, Embedded Ram 

IP Core

DPC HDR

DPC HDR obtains an HDR (High Dynamic Range) output stream from two separate input streams (high exposure and low exposure).

ECP5 / ECP5-5G, CrossLink 

RISC-V, AXI, Image Processing, Video Tx/Rx, Embedded Ram 

IP Core

DPC Statistics RGB

DPC Statistics RGB provides, for each frame, the histograms of the R, G and B channels.

ECP5 / ECP5-5G, CrossLink 

RISC-V, AXI, Image Processing, Video Tx/Rx, Embedded Ram 

IP Core

DPC Statistics YCbCr

DPC Statistics YCbCr provides, for each frame, the histograms of the Y, Cb and Cr channels.

ECP5 / ECP5-5G, CrossLink 

RISC-V, AXI, Image Processing, Video Tx/Rx, Embedded Ram 

IP Core

DPC Subsampler 4:2:2

DPC Subsampler422 is a simple IP block for real-time conversion of a YCbCr 4:4:4 video stream to a YCbCr 4:2:2 stream.

ECP5 / ECP5-5G, CrossLink 

RISC-V, AXI, Image Processing, Video Tx/Rx, Embedded Ram 

IP Core

1 Input to 1 Output MIPI CSI-2 Camera Repeater Bridge

Archived IP - Use newer Modular MIPI/D-PHY IP for this function. Used as a repeater to extend the length between the camera and the host processor.

CrossLink 

CSI-2, MIPI, UAVs 

IP Core

1 Input to 1 Output MIPI DSI Display Interface Bridge

Archived IP - Use newer Modular MIPI/D-PHY IP for this function. MIPI DSI to MIPI DSI pass through for updated DCS config, scaling / cropping, or as a redriver.

CrossLink 

DSI, MIPI 

IP Core

1 Input to 2 Output MIPI CSI-2 Camera Splitter Bridge

Archived IP - Use newer Modular MIPI/D-PHY IP for this function. Connects to two cameras from a single application processor port.

CrossLink 

CSI-2, MIPI 

IP Core

1 Input to 2 Output MIPI DSI Display Splitter Bridge

Archived IP - Use newer Modular MIPI/D-PHY IP for this function. Expands the number of display interfaces supported by an Application Processor.

CrossLink 

DSI, MIPI