Object Classification Reference Design

CNN accelerated object classification using Low Power Lattice FPGAs

Add Object classification to Edge Devices – the reference design provides examples for implementing machine-learning based object classification applications. The reference design provides low power, CNN-based acceleration of the classification algorithm.

Hardware Optimized Examples – complete design examples running on popular Lattice development boards (including FPGA RTL) include NN Models and sample training datasets and scripts to recreate and update the example as needed. Same examples are provided through sensAI Studio.

Features

  • Fast prototyping of solution and transfer learning to create additional use cases
  • Reference design includes all components needed to replicate the design
  • Lattice FPGA handles downscaling of image data received from the image sensor, NN processing and basic ISP functionality

Jump to

Block Diagram

Documentation

Technical Resources
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
CertusPro-NX MobileNet Object Classification on VVML Board Reference Design - Source Code
1.0 1/12/2022 ZIP 502.2 MB
CertusPro-NX MobileNet Object Classification on VVML Board Reference Design - User Guide
FPGA-RD-02242 1.0 1/12/2022 PDF 5.4 MB
CrossLink-NX Auto ML based Object Classification Reference Design - User Guide
FPGA-RD-02258 1.0 6/7/2022 PDF 703.6 KB
CrossLink-NX Auto ML based Object Classification Reference Design - Source Code
FPGA-RD-02258 1.0 6/7/2022 ZIP 106.3 KB

*By clicking on the "Notify Me of Changes" button, you agree to receive notifications on changes to the document(s) you selected.