Human Presence Detection AI Demo

Lattice sensAI Demo

Scalable Human Presence Detection – This demo uses artificial intelligence (AI) to implement a human presence detection algorithm. FPGAs have flexible parallel data processing ability, making them more power efficient at such tasks compared to a microprocessor.

Always-on, Local Intelligence Improves Security – Bringing AI to the network edge is challenging, but it also offers tremendous opportunity. Designing AI into an iCE40 UltraPlus or ECP5 FPGA instead of cloud-based resources can dramatically reduce power consumption, limiting or even eliminating network bandwidth and latency while accelerating response time. Local processing improves system robustness and security.

Scalable Multi-engine CNN Across Two FPGA Families – The Lattice inference engine with CNN architecture is able to fit into the iCE40 UltraPlus and several devices of the ECP5 FPGA Family.


  • Accelerated, low-power human presence detection at the network edge using neural network model
  • iCE40 UltraPlus
    • VGG8 like 16-bit CNN
    • 64*64*3 input
    • 6 zone searching
    • Up to 8 frames per second
    • 7 mW of power consumption
  • ECP5 85
    • VGG8 like 16-bit CNN
    • 128*128*3 input
    • 6 zone searching
    • 15 frames per second depending on network selection
    • 0.85 W of power consumption
  • Adjustable frame-rate
  • Can be optimized between power and response time depending on system needs
Lattice sensAI

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Block Diagram

Human Presence Detection Demo Block Diagram using iCE40 UltraPlus


Quick Reference
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EVDK Based Human Presence Detection Demonstration User Guide
FPGA-UG-02061 1.1 9/1/2019 PDF 1.6 MB
Himax HM01B0 UPduino Shield Based Human Presence Detection Low Power Demonstration User Guide
FPGA-UG-02077 2.1 10/23/2019 PDF 827.8 KB
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Human Presence Detection on HM01B0 UPduino Shield Demonstration Bitstreams
2.1 10/23/2019 ZIP 165.6 KB
EDVK Based Human Presence Detection Low Power Demonstration Bitstreams
1.0 9/26/2018 ZIP 3 MB

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