Lattice Solutions

Reference Design

Citrobits HyperRAM™ Reference Design

Performance-optimized reference design for HyperRAM™ Controller, using Lattice Propel for connecting it via AXI4 to RISC-V for memory intense applications.

Certus-NX, CrossLink-NX, CertusPro-NX 

HyperRAM 

IP Core

FFT Compiler IP Core

The FFT Compiler IP Core can be configured to perform forward FFT, inverse FFT (IFFT), or port selectable forward/inverse FFT.

ECP5 / ECP5-5G, LatticeECP3, LatticeECP2/M, Certus-NX, CertusPro-NX, MachXO5-NX, CrossLink-NX, Avant-E, Avant-G, Avant-X, Certus-N2 

Data Communication, DSP, Guidance Systems, Automotive, DSP Bundle, SDR 

IP Core

FIR Filter Generator IP Core

This IP core is a widely configurable, multi-channel FIR filter, implemented using high performance sysDSP™ blocks available in Lattice devices.

ECP5 / ECP5-5G, LatticeECP3, LatticeXP2, CrossLink-NX, Certus-NX, CertusPro-NX, MachXO5-NX, Avant-E, Avant-G, Avant-X, Certus-N2 

DSP, Guidance Systems, Automotive, DSP Bundle, SDR 

IP Core

Image Signal Processing IP Cores Suite

The Lattice mVision ISP IP Core implements ISP pipelines for image quality enhancements in embedded designs based on Lattice FPGA devices.

CrossLink-NX, Certus-NX, CertusPro-NX, Avant-E 

AXI, AXI-Stream, AXI-Lite Interface, AWB, Camera, CCM, CFA Interpolation, Debayer, Image Processing, Image Signal Processing, Lattice mVision, RGB, Defense 

Reference Design

​​I/O Aggregation Over USB with CrossLinkU-NX Reference Design​

USB to IO Bridging Reference Design Create plug-and-play peripheral expansion on USB-enabled FPGA & signal protocol conversion from USB to I2C, SPI, & GPIO.

CrossLink-NX 

USB, USB2, USB3, I2C, SPI, JTAG, LVDS, SLVS, FTDI 

Board

CrossLinkU-NX Evaluation Board

CrossLinkU-NX Evaluation Board is a platform for general purpose application development using CrossLinkU-NX device, the first FPGA with hard USB2/3 (5Gbps) interface.

CrossLink-NX 

USB, USB2, USB3, I2C, SPI, JTAG, LVDS, SLVS, FTDI 

IP Core

USB 2.0/3.2 IP Core

Lattice USB 2.0/3.2 IP Core provides a solution to interface with a USB host and can be targeted to the Lattice CrossLink-NX FPGA Devices.

CrossLink-NX 

USB, USB2, USB3, AHB, AHB-L, AHB-Lite, AXI, I2C, SPI, JTAG, LVDS, SLVS, FTDI 

Reference Design

Object Classification Reference Design

The Object Classification reference design shows examples on implementing machine-learning based object classification to edge devices applications.

CertusPro-NX, Avant-E, CrossLink-NX 

Machine Learning/AI, Lattice sensAI, Object Detection, Object Identification, Space 

Demo

User Tracking and Onlooker Detection Demonstration

Sample demonstration for detection and tracking of multiple human faces running on a low power general purpose FPGA using CNN Model

CrossLink-NX 

Machine Learning/AI, Lattice sensAI, Image Processing, Camera, FaceI dentification 

Board

エンベデッドビジョン開発キット

組込みビジョン処理向けモジュールプラットフォーム

CrossLink, ECP5 / ECP5-5G 

3D Video, Camera, DDR SDRAM, HDMI, Image Processing, Machine Learning/AI, Signal Aggregation, Video Tx/Rx, VIP, Lattice mVision, IoT & Wearables, Smart Toys & Robots, Home Control Appliances & Security, Notebooks & PCs, Tablets, Printers, AR / VR & Drones, UAVs, Lattice sensAI EVE 

Demo

PCIe Basic Demo for Lattice Nexus-based FPGAs

The PCIe Basic Demo allows you to control three 7 segment LEDs and manipulate the onboard memory of the FPGA through the PCIe slot.

CrossLink-NX, Certus-NX, CertusPro-NX 

SPI, Camera, CSI Camera, Ethernet, PCIe, PMOD, RJ-45, X/S/RGMII, UAVs, Automotive, Bus Controllers, Defense, LED, Nexus PCIe 

Demo

PCIe Colorbar Demo for Lattice Nexus-based FPGAs

PCIe Colorbar Demo displays a series of moving colorbars by streaming the image data using DMA transfers from the FPGA to the host system.

CrossLink-NX, Certus-NX, CertusPro-NX 

SPI, Camera, CSI Camera, Ethernet, PCIe, PMOD, RJ-45, X/S/RGMII, UAVs, Automotive, Bus Controllers, Defense, LED, Nexus PCIe 

Demo

PCIe DMA Throughput Demo for Lattice Nexus-based FPGAs

The PCI Express DMA Throughput Demo allows to initiate DMA read and write transactions, transferring data from the host to the FPGA and vice versa.

CrossLink-NX, Certus-NX, CertusPro-NX 

SPI, Camera, CSI Camera, Ethernet, PCIe, PMOD, RJ-45, X/S/RGMII, UAVs, Automotive, Bus Controllers, Defense, LED, Nexus PCIe 

Demo

PCIe Multifunction Demo for Lattice Nexus-based FPGAs

Demonstrates the multifunction capabilities of the Crosslink-NX FPGA that allows access to GPIO, MDIO and I2C registers.

CrossLink-NX, Certus-NX, CertusPro-NX, MachXO5-NX 

SPI, Camera, CSI Camera, Ethernet, PCIe, PMOD, RJ-45, X/S/RGMII, UAVs, Automotive, Bus Controllers, Defense, I2C, LED, GPIO, Nexus PCIe 

Board

CrossLink-NX Voice and Vision Machine Learning Board

Designed for low-power machine learning applications with Lattice sensAI and CrossLink-NX. Includes image sensors, microphones, HyperRAM, and expansion ports.

CrossLink-NX 

CSI-2, CSI Camera, Camera, Microphone, PMOD, HyperRAM, Machine Learning/AI, Lattice sensAI, Automotive 

Board

CrossLink-NX-33 Voice and Vision Machine Learning Board

CrossLink-NX-33 Voice and Vision Machine Learning Board is designed using Crosslink-NX 33K, ideal for machine learning applications.

CrossLink-NX 

CSI-2, SPI, CSI Camera, Camera, Microphone, PMOD, Machine Learning/AI, Lattice sensAI, Automotive, Lattice sensAI EVE, sensAIEdgeVisionSDK 

IP Core

PCI Express for Nexus FPGAs

The Lattice PCIe IP Core provides a flexible, high-performance, easy-to-use Transaction Layer Interface to the PCI Express Bus.

CrossLink-NX, Certus-NX, CertusPro-NX, MachXO5-NX 

APB, AHB, AHB-Lite, RTL, PCI, PCIe, Bus Controllers, Defense, Automotive, PCIe Bundle, SDR 

IP Core

RISC-V MC CPU IP Core

The Lattice RISC-V MC CPU soft IP contains a 32-bit RISC-V processor core and optional submodules – Timer and Programmable Interrupt Controller (PIC).

MachXO3D, Certus-NX, CrossLink-NX, Avant-E, MachXO5-NX, CertusPro-NX, MachXO3 – 制御/ブリッジFPGA, MachXO2, Avant-G, Avant-X 

AHB-Lite, Soft Processor, RISC-V, Lattice Propel, TOR Switch, Defense, Automotive, SDR 

IP Core

RISC-V SM CPU IP Core

Lattice RISC-V SM CPU IP core supports the RV32I instruction set, external interrupt, and debug feature, which is JTAG – IEEE 1149.1 compliant.

Avant-E, MachXO5-NX, Certus-NX, CertusPro-NX, CrossLink-NX, MachXO3D, MachXO3 – 制御/ブリッジFPGA, MachXO2, Avant-G, Avant-X 

AHB-Lite, Soft Processor, RISC-V, Lattice Propel, TOR Switch, Defense, Automotive, SDR 

IP Core

RISC-V RX CPU IP Core

Lattice RISC-V RX IP processes data and instructions while monitoring the external interrupts, using 32-bit RISC-V processor core and several submodules.

Avant-E, MachXO5-NX, Certus-NX, CertusPro-NX, CrossLink-NX, Avant-G, Avant-X 

AHB-Lite, Soft Processor, RISC-V, RTOS, Lattice Propel, Defense, Automotive