Lattice Solutions

IP Core

FFT Compiler IP Core

The FFT Compiler IP Core can be configured to perform forward FFT, inverse FFT (IFFT), or port selectable forward/inverse FFT.

ECP5 / ECP5-5G, LatticeECP3, LatticeECP2/M, Certus-NX, CertusPro-NX, MachXO5-NX, CrossLink-NX, Avant-E, Avant-G, Avant-X, Certus-N2 

Data Communication, DSP, Guidance Systems, Automotive, DSP Bundle, SDR 

IP Core

FIR Filter Generator IP Core

This IP core is a widely configurable, multi-channel FIR filter, implemented using high performance sysDSP™ blocks available in Lattice devices.

ECP5 / ECP5-5G, LatticeECP3, LatticeXP2, CrossLink-NX, Certus-NX, CertusPro-NX, MachXO5-NX, Avant-E, Avant-G, Avant-X, Certus-N2 

DSP, Guidance Systems, Automotive, DSP Bundle, SDR 

IP Core

​​JESD204B IP Core​

​​The Lattice JESD204B IP Core is a high-speed serial interface used between data converters, and the FPGA device to replace traditional interfaces.​

ECP5 / ECP5-5G, LatticeECP3, CertusPro-NX 

ADC/DAC, DSP, SDR 

IP Core

10Gb Ethernet MAC+PHY IP Core

The Lattice 10G Ethernet (GbE) IP core supports the ability to transmit and receive data between a host processor and an Ethernet network.

Avant-G, Avant-X, CertusPro-NX 

Ethernet, PCS, XGMII, AXI4, Ethernet Bundle, SDR 

IP Core

25Gb Ethernet MAC+PHY IP Core

The Lattice Semiconductor 25G Ethernet (GbE) IP core supports the ability to transmit and receive data between a host processor and an Ethernet network.

Avant-X 

Ethernet, Lattice Avant, IEEE 802.3, Ethernet Bundle, SDR 

IP Core

PCI Express x1, x4 Root Complex Lite IP Core

Provides a PCI Express x1 and x4 root complex solution from the electrical SERDES interface, physical layer, data link layer and a minimum transaction layer in PCIe protocol stack

ECP5 / ECP5-5G, LatticeECP3, LatticeECP2/M 

PCIe, Guidance Systems, Automotive, PCIe Bundle, SDR 

IP Core

Image Signal Processing IP Cores Suite

The Lattice mVision ISP IP Core implements ISP pipelines for image quality enhancements in embedded designs based on Lattice FPGA devices.

CrossLink-NX, Certus-NX, CertusPro-NX, Avant-E 

AXI, AXI-Stream, AXI-Lite Interface, AWB, Camera, CCM, CFA Interpolation, Debayer, Image Processing, Image Signal Processing, Lattice mVision, RGB, Defense 

IP Core

MACsec AES256-GCM, High-speed (XIP1213H)

The high-speed MACsec IP core implements the MACsec protocol as standardized in IEEE 802.1AE-2018, defining a security infrastructure for OSI model Layer 2 traffic.

Avant-E, Avant-G, Avant-X 

AES, Encryption, NIST, Security, ECC, Public/Private Key, SHA, SDR 

IP Core

QSPI Flash Controller IP Core

The QSPI Flash Controller IP allows communication with multiple external SPI flash devices using standard, extended dual/quad, dual, or quad SPI protocols.

Avant-E, Avant-G, Avant-X, CertusPro-NX, Certus-NX, Certus-N2 

QSPI, SPI Flash, SPI, Flash 

IP Core

USB 2.0/3.2 IP Core

Lattice USB 2.0/3.2 IP Core provides a solution to interface with a USB host and can be targeted to the Lattice CrossLink-NX FPGA Devices.

CrossLink-NX 

USB, USB2, USB3, AHB, AHB-L, AHB-Lite, AXI, I2C, SPI, JTAG, LVDS, SLVS, FTDI 

IP Core

ML-KEM-512/768/1024 (CRYSTALS-Kyber), Balanced (XIP6110B)

ML-KEM-512/768/1024 is an IP core for post-quantum Key Encapsulation Mechanism (KEM), optimized for a good balance between speed and resource requirements.

Avant-E, Avant-G, Avant-X, CertusPro-NX, ECP5 / ECP5-5G 

Encryption, NIST, Public/Private Key, Security, SDR 

IP Core

​​eSPI Target IP Core​

​​Lattice eSPI Target IP Core is compliant with the Intel eSPI specifications & has its own virtual wire channel in the user interface.​

MachXO5-NX, Mach-NX, MachXO3D, MachXO3 – 制御/ブリッジFPGA, MachXO2 

APB, AHB-Lite, Lattice Sentry 

IP Core

PCI Express for Nexus FPGAs

The Lattice PCIe IP Core provides a flexible, high-performance, easy-to-use Transaction Layer Interface to the PCI Express Bus.

CrossLink-NX, Certus-NX, CertusPro-NX, MachXO5-NX 

APB, AHB, AHB-Lite, RTL, PCI, PCIe, Bus Controllers, Defense, Automotive, PCIe Bundle, SDR 

IP Core

RISC-V MC CPU IP Core

The Lattice RISC-V MC CPU soft IP contains a 32-bit RISC-V processor core and optional submodules – Timer and Programmable Interrupt Controller (PIC).

MachXO3D, Certus-NX, CrossLink-NX, Avant-E, MachXO5-NX, CertusPro-NX, MachXO3 – 制御/ブリッジFPGA, MachXO2, Avant-G, Avant-X 

AHB-Lite, Soft Processor, RISC-V, Lattice Propel, TOR Switch, Defense, Automotive, SDR 

IP Core

RISC-V SM CPU IP Core

Lattice RISC-V SM CPU IP core supports the RV32I instruction set, external interrupt, and debug feature, which is JTAG – IEEE 1149.1 compliant.

Avant-E, MachXO5-NX, Certus-NX, CertusPro-NX, CrossLink-NX, MachXO3D, MachXO3 – 制御/ブリッジFPGA, MachXO2, Avant-G, Avant-X 

AHB-Lite, Soft Processor, RISC-V, Lattice Propel, TOR Switch, Defense, Automotive, SDR 

IP Core

RISC-V RX CPU IP Core

Lattice RISC-V RX IP processes data and instructions while monitoring the external interrupts, using 32-bit RISC-V processor core and several submodules.

Avant-E, MachXO5-NX, Certus-NX, CertusPro-NX, CrossLink-NX, Avant-G, Avant-X 

AHB-Lite, Soft Processor, RISC-V, RTOS, Lattice Propel, Defense, Automotive 

IP Core

PCI Express for Avant FPGAs

The Lattice PCIe X8 IP Core provides a flexible, high-performance, easy-to-use Transaction Layer Interface to the PCI Express Bus.

Avant-G, Avant-X 

AXI, AHB, AHB-Lite, RTL, PCIe, Bus Controllers, Defense, Automotive, Lattice Avant, PCI, PCIe Bundle, SDR 

IP Core

RISC-V Nano CPU IP Core

The RISC-V Nano CPU IP contains a 32-bit RISC-V processor core that supports the RV32I instruction set and a lightweight interrupt merge controller.

Avant-E, Avant-G, Avant-X, MachXO5-NX, CrossLink-NX, Certus-NX, CertusPro-NX 

Soft Processor, RISC-V, Lattice Propel, Lattice Diamond, Lattice Radiant, Defense, AHB-Lite 

IP Core

Tightly-Coupled Memory (TCM) IP Core

The Tightly-Coupled Memory (TCM) IP ensures low-latency automatic selection of the best memory type for user-selected application.

Avant-E, Avant-G, Avant-X, MachXO5-NX, Certus-NX, CertusPro-NX, CrossLink-NX 

Embedded Ram, FIFO, Lattice Propel, Lattice Diamond, Lattice Radiant, Defense 

IP Core

RISC-V I/O Physical Memory Protection (IOPMP) IP Core

RISC-V I/O Memory Protection IP protects the data in specific memory regions and allows the CPU to control external AXI manager access to AXI subordinates at run-time.

Avant-E, Avant-G, Avant-X, MachXO5-NX, CrossLink-NX, Certus-NX, CertusPro-NX 

Soft Processor, RISC-V, Lattice Propel, Lattice Diamond, Lattice Radiant, Defense