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ID: 6321
Case Type: faq
Category: MIPI D-PHY RX/TX
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Family: CrossLink-NX

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Why are there no exception constraints between the byte clock and pixel clock, e.g. set_clock_groups constraints for each clock in the IP LDC file?

The set_clock_groups or any exception constraints were not defined in the IP LDC file as it would be difficult if the IP is used in a system design and the customer wants to analyze the paths between the clocks or does not want the clock domain crossing (CDC) paths to be false.

If it is a design decision by the customer to apply the exception constraints between the clocks, then he can he can do this by adding the set_clock_groups or set_false_paths on the top-level SDC/LDC or PDC file.