Guidance Systems

Meet mission requirements with low power and high reliability advantages of Lattice FPGAs

Related Applications


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For over 25 years, , Lattice has enabled leading-edge guidance systems with a wide range of high reliability, SWAP-C optimized products that meet today’s security, longevity, and extreme environment challenges. Engineers at leading defense contractors rely on our deep system-level knowledge, collaborative spirit, local support, and design resources to meet the most stringent design requirements.

Lattice COTS FPGAs provide the flexibility to adapt to the requirements of next generation precision guided systems with low power actuator control, sensor fusion, and signal processing solutions. The latest Lattice Nexus platform features industry leading low power and high reliability to meet the challenging requirements of next generation guidance platforms.

Key Lattice FPGA Features & Benefits

  • Superior low power consumption and thermal performance compared to other FPGAs, enabling longer missions, and simplifying thermal management
  • Industry leading small form factor FPGAs, optimized for highest I/O density, connect to more sensors, creating a high-fidelity situational awareness
  • Lowest soft error rate (SER) in its class and highest latch-up immunity to maximize integrity of ground-based and airborne systems
  • Enables low latency, deterministic, instant-on start-up with initial I/O configuration in less than 3 ms and full device configuration in as little as 8 ms

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Example Applications

Actuator controlExpand Image

Actuator Control

  • Single-chip non-volatile FPGAs with 2ms bitstream verification, authentication and boot-up time
  • Embedded A/D converters for sensor fusion, feedback and sensing
  • Packages as small as 6x6 mm, and in ball-pitch options of 0.5 and 0.8 mm
Trigger SystemsExpand Image

Trigger

  • Critical bitstream verification and safety compliance
  • ECDSA bitstream authentication, coupled with robust AES-256 encryption
  • Robust flash-based FPGAs ideal for sensor processing and control
TelemetryExpand Image

Telemetry

  • Power efficient, highly reliable system control and monitoring
  • Optimum integration level with embedded MCU and ADCs
  • Utmost control and flexibility in sense and control of rea-time data

Reference Designs

Redundant Power Supply Management

Reference Design

Redundant Power Supply Management

Uses a Lattice Power Manager II device to achieve Redundant Power Supply Management using the power supply OR’ing technique
パワーマネージャ2 
Mixed-Signal, Power Management, Guidance Systems, Defense, SDR 
Redundant Power Supply Management
SPIスレーブからPWM生成

Reference Design

SPIスレーブからPWM生成

Sets the frequency and duty cycle of a PWM (Pulse-Width Modulator) using data from an external SPI master.
MachXO2, iCE40 UltraPlus 
SPI, PWM, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, Guidance Systems, Space 
SPIスレーブからPWM生成
センサインターフェースと処理

Reference Design

センサインターフェースと処理

オールウェイズオンで低消費電力のセンサーハブ
iCE40 UltraPlus, iCE40 Ultra / UltraLite, iCE40 
Accelerometer, Compass, Gyroscope, I2C, IrDA, Pressure Sensor, Signal Aggregation, SPI, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, Guidance Systems, Space 
センサインターフェースと処理
簡易シグマデルタ ADC

Reference Design

簡易シグマデルタ ADC

Implements an Analog-to-Digital (ADC) using on-FPGA differntial LVDS inputs (or inexpensive analog comparitor). Save cost by eliminating external ADC devices.
MachXO, MachXO2, LatticeXP2, iCE40 UltraPlus 
ADC/DAC, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, Guidance Systems 
簡易シグマデルタ ADC
組込み機能ブロックを使ったI2Cスレーブ周辺機器

Reference Design

組込み機能ブロックを使ったI2Cスレーブ周辺機器

Ready to use RTL code segment that implements intuitive interface between an external I2C master and the MachXO2 internal registers or memory extension in XO2
MachXO2, MachXO3 – 制御/ブリッジFPGA 
Bus Controllers, I2C, TOR Switch, Guidance Systems 
組込み機能ブロックを使ったI2Cスレーブ周辺機器
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IP Cores

FFT Compiler IP Core

IP Core

FFT Compiler IP Core

The FFT Compiler IP Core can be configured to perform forward FFT, inverse FFT (IFFT), or port selectable forward/inverse FFT.
ECP5 / ECP5-5G, LatticeECP3, LatticeECP2/M, LatticeXP2, Certus-NX, CertusPro-NX, MachXO5-NX, CrossLink-NX, Avant-E, Avant-G, Avant-X 
Data Communication, DSP, Guidance Systems, Automotive, DSP Bundle, SDR 
FFT Compiler IP Core
FIR Filter Generator IP Core

IP Core

FIR Filter Generator IP Core

This IP core is a widely configurable, multi-channel FIR filter, implemented using high performance sysDSP™ blocks available in Lattice devices.
ECP5 / ECP5-5G, LatticeECP3, LatticeXP2, CrossLink-NX, Certus-NX, CertusPro-NX, MachXO5-NX, Avant-E, Avant-G, Avant-X 
DSP, Guidance Systems, Automotive, DSP Bundle, SDR 
FIR Filter Generator IP Core
PCI Express x1, x4 Root Complex Lite IP Core

IP Core

PCI Express x1, x4 Root Complex Lite IP Core

Provides a PCI Express x1 and x4 root complex solution from the electrical SERDES interface, physical layer, data link layer and a minimum transaction layer in PCIe protocol stack
ECP5 / ECP5-5G, LatticeECP3, LatticeECP2/M 
PCIe, Guidance Systems, Automotive, PCIe Bundle, SDR 
PCI Express x1, x4 Root Complex Lite IP Core
CSI-2 / DSI D-PHY トランスミッタ

IP Core

CSI-2 / DSI D-PHY トランスミッタ

MIPI D-PHY 用 モジュラー IP - MIPI CSI-2/DSI データ送信用 PHY、最大 4 レーン、10 Gbps をサポート
Avant-E, Avant-G, Avant-X, CrossLink-NX, Certus-NX, CertusPro-NX, MachXO5-NX 
CSI-2, DSI, MIPI, Modular MIPI/D-PHY, Video Tx/Rx, Lattice mVision, AR / VR & Drones, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, Guidance Systems, Automotive, Space, MIPI Bundle 
CSI-2 / DSI D-PHY トランスミッタ
バイト ー ピクセル変換

IP Core

バイト ー ピクセル変換

MIPI D-PHY 用 モジュラー IP - D-PHY 受信パラレルデータをピクセルフォーマットへ変換
CrossLink, CrossLinkPlus, CrossLink-NX, Certus-NX, CertusPro-NX, Avant-E, MachXO5-NX, Avant-G, Avant-X 
MIPI, Modular MIPI/D-PHY, Parallel Video, Video Tx/Rx, Lattice mVision, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, Guidance Systems, Automotive, Space, MIPI Bundle 
バイト ー ピクセル変換
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Development Kits & Boards

ECP5 Versa 開発キット

Board

ECP5 Versa 開発キット

ECP5 Versa開発キットでPCI Express,、Gigabit Ethernet、DDR3、汎用Serdesパフォーマンスを含むECP5の主要機能の迅速な評価が可能
ECP5 / ECP5-5G 
Data Communication, Ethernet, PCIe, SERDES, SMA, Versa Connector, DDR SDRAM, TOR Switch, Guidance Systems 
ECP5 Versa 開発キット
ECP5-5G Versa開発キット

Board

ECP5-5G Versa開発キット

PCI Express、Gigabit Ethernet、DDR3、ECP5-5G SERDESの性能を評価する
ECP5 / ECP5-5G 
Data Communication, Ethernet, PCIe, SERDES, SMA, Versa Connector, DDR SDRAM, Guidance Systems 

Board

ASCブリッジボード


 
Mixed-Signal, Power Management, RS-232, Versa Connector, TOR Switch, Guidance Systems 
L-ASC10ブレークアウトボード

Board

L-ASC10ブレークアウトボード

L-ASC10デバイスを評価および設計する多才なハードウェアプラットフォームです。 このボードは、プラットフォームマネージャー 2開発キットとともに動作するように設計されています。
プラットホーム・マネージャ2 
Mixed-Signal, Power Management, RS-232, TOR Switch, Guidance Systems 
L-ASC10ブレークアウトボード
POWR1014A Breakout Board

Board

POWR1014A Breakout Board

A simple low-cost board that provides complete I/O access to the Power Manager II (POWR1014A)+LEDs, Prototyping area and more.
パワーマネージャ2 
Breakout, Mixed-Signal, Power Management, TOR Switch, Guidance Systems 
POWR1014A Breakout Board
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Demos

Power Sequencing with Fault Logging Demo

Demo

Power Sequencing with Fault Logging Demo

Uses L-ASC10 to monitor, sequence four separate Power Planes from a central control point. Logs faults with timestamps. Expandable.
プラットホーム・マネージャ2, MachXO3 – 制御/ブリッジFPGA 
Mixed-Signal, Power Management, TOR Switch, Guidance Systems, 5G, Defense, SDR 
Power Sequencing with Fault Logging Demo

Documentation

Quick Reference
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
Soft Error Detection (SED)/Correction (SEC) User Guide for Nexus Platform
FPGA-TN-02076 2.1 7/18/2024 PDF 614.6 KB
Multi-Boot User Guide for Nexus Platform
FPGA-TN-02145 2.0 9/10/2024 PDF 1.1 MB
Implementing JOTP-051-Compliant Safety Features in Lattice FPGAs
FPGA-TN-02150 1.1 3/15/2021 PDF 855.2 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
Soft Error Detection (SED)/Correction (SEC) User Guide for Nexus Platform
FPGA-TN-02076 2.1 7/18/2024 PDF 614.6 KB
Multi-Boot User Guide for Nexus Platform
FPGA-TN-02145 2.0 9/10/2024 PDF 1.1 MB
Implementing JOTP-051-Compliant Safety Features in Lattice FPGAs
FPGA-TN-02150 1.1 3/15/2021 PDF 855.2 KB

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