DI2CM: I2C Bus Interface - Master

DCD LogoI2C is a two-wire, bi-directional serial bus that provides a simple and efficient method of data transmission over a short distance between many devices. The DI2CM core provides an interface between a microprocessor / microcontroller and an I2C bus. It can work as a master transmitter or master receiver depending on working mode determined by microprocessor/microcontroller. The DI2CM core incorporates all features required by the latest I2C specification including clock synchronization, arbitration, multi-master systems and High-speed transmission mode. Built-in timer allows operation from a wide range of the clk frequencies.

DI2CM is a technology independent design that can be implemented in a variety of process technologies.

Features

  • Conforms to v.2.1 of the I2C specification
  • Master operation
    • Master transmitter
    • Master receiver
  • Support for all transmission speeds
    • Standard (up to 100 kb/s)
    • Fast (up to 400 kb/s)
    • High Speed (up to 3,4 Mb/s)
  • Arbitration and clock synchronization
  • Support for multi-master systems
  • Support for both 7-bit and 10-bit address-ing formats on the I2C bus
  • Interrupt generation
  • Build-in 8-bit timer for data transfers speed adjusting
  • Host side interface dedicated for micro-processors/microcontrollers
  • User-defined timing (data setup, start setup, start hold, etc.)
  • Fully synthesizable
  • Static synchronous design
  • Positive edge clocking and no internal tri-states
  • Scan test ready

Applications

  • Embedded microprocessor boards
  • Consumer and professional audio/video
  • Home and automotive radio
  • Low-power applications
  • Communication systems
  • Cost-effective reliable automotive systems

Jump to

Block Diagram

Performance and Size

Device Speed grade LUTs/PFUs Fmax
SC -7 295/124 301 MHz
ECP2 -7 285/120 253 MHz
ECP2M -7 285/120 253 MHz
EC -5 340/120 185 MHz
ECP -5 340/120 183 MHz
XP -5 340/120 155 MHz
XP2 -7 239/120 210 MHz
ispXPGA -5 363/103 107 MHz
ORCA 4 -3 387/57 69 MHz
ORCA 3 -7 316/57 43 MHz

Ordering Information

This IP core is supported and sold by DCD, contact DCD at support@dcd.pl or visit their website at www.dcd.pl for more information.

Documentation

Quick Reference
TITLE NUMBER VERSION DATE FORMAT SIZE
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DCD: DI2CM: I2C Bus Interface - Master
3.11 6/22/2007 PDF 147.3 KB

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