Lattice Solutions

Everything you need to quickly and easily complete your design

Share This Result >

Narrow Your Results



Solution Type



Device Support


























Tags






































































































































































Providers

Clear All
  • ​​I/O Aggregation Over USB with CrossLinkU-NX Reference Design​

    Reference Design

    ​​I/O Aggregation Over USB with CrossLinkU-NX Reference Design​

    USB to IO Bridging Reference Design Create plug-and-play peripheral expansion on USB-enabled FPGA & signal protocol conversion from USB to I2C, SPI, & GPIO.
    ​​I/O Aggregation Over USB with CrossLinkU-NX Reference Design​
  • GHRD/GSRD Reference Design

    Reference Design

    GHRD/GSRD Reference Design

    The Golden Hardware and Software Reference Design comprises of components for developing various kind of applications using CertusPro-NX Versa Board.
  • Lattice and NVIDIA Edge AI Solution

    Reference Design

    Lattice and NVIDIA Edge AI Solution

    The board is fully integrated into NVIDIA IGX/AGX™ system software offering open-source enablement IP and easy programmable system control.
    Lattice and NVIDIA Edge AI Solution
  • Secure Connected Motion Control Platform

    Reference Design

    Secure Connected Motion Control Platform

    ​​This platform offers resilient connectivity, low power consumption, high performance, and robust security is increasing across various industries.​
    Secure Connected Motion Control Platform
  • Object Classification Reference Design

    Reference Design

    Object Classification Reference Design

    The Object Classification reference design shows examples on implementing machine-learning based object classification to edge devices applications.
    Object Classification Reference Design
  • Hand Gesture Detection

    Reference Design

    Hand Gesture Detection

    Implements a low power AI based system to detect hand gestures using an IR image sensor
    Hand Gesture Detection
  • Barcode Detection Reference Design

    Reference Design

    Barcode Detection Reference Design

    Exhibits the barcode detection using CertusPro-NX Voice & Vision Machine Learning Board & its camera barcode detection potential based on Yolov5 NN models.
    Barcode Detection Reference Design
  • Lattice Nexus Device Multi-Boot Reference Design

    Reference Design

    Lattice Nexus Device Multi-Boot Reference Design

    Multi-Boot mode supports booting from up to 6 patterns that reside in an external SPI flash device, up to 3 patterns for MachXO5-NX internal flash memory.
    Lattice Nexus Device Multi-Boot Reference Design
  • Lattice ORAN™ 1.0 Security Reference Design

    Reference Design

    Lattice ORAN™ 1.0 Security Reference Design

    Lattice ORAN enable secure out-of-band communication over I3C/SMBus/I2C/PCIe and provide crypto-256 and Crypto-384 services to customers through software APIs.
    Lattice ORAN™ 1.0 Security Reference Design
  • Lattice Sentry 4.0 SCM and HPM CPLD Reference Design

    Reference Design

    Lattice Sentry 4.0 SCM and HPM CPLD Reference Design

    ​​This is a CPLD design template for the Secure Control Module (SCM) and Host Platform Module (HPM) for the Sentry 4.0 Server solution platform.​
    Lattice Sentry 4.0 SCM and HPM CPLD Reference Design
  • MIPI CSI-2 to HDMI Reference Design

    Reference Design

    MIPI CSI-2 to HDMI Reference Design

    MIPI CSI-2 to HDMI Reference Design includes the synthesizable MIPI-HDMI core design & stimulus generators, checkers, & a testbench necessary to simulate the design
    MIPI CSI-2 to HDMI Reference Design
  • MPESTI Initiator Reference Design

    Reference Design

    MPESTI Initiator Reference Design

    MPESTI Initiator Reference Design provides the solution template which is compliant with the MPESTI Base Specification.
    MPESTI Initiator Reference Design
  • TSEMAC & SGMII Reference Design

    Reference Design

    TSEMAC & SGMII Reference Design

    Lattice TSEMAC & SGMII Reference Design implements 1G/100M/10M Ethernet application using a TSEMAC IP Core with a SGMII PCS IP Core in loopback mode.
    TSEMAC & SGMII Reference Design
  • ​​Avant MIPI-to-Parallel and Parallel-to-MIPI Bridges Reference Design​

    Reference Design

    ​​Avant MIPI-to-Parallel and Parallel-to-MIPI Bridges Reference Design​

    ​​The design allows quick interface for a processor with a MIPI DSI with an RGB interface, or camera with MIPI CSI-2 to a processor with parallel interface​
    ​​Avant MIPI-to-Parallel and Parallel-to-MIPI Bridges Reference Design​
  • APB to AHB-Lite Bridge Reference Design

    Reference Design

    APB to AHB-Lite Bridge Reference Design

    The APB to AHB-Lite Bridge Reference Design provides an interface between the low power APB and the high-speed AHB-Lite.
    APB to AHB-Lite Bridge Reference Design
  • DisplayPort & Video Scaler Reference Design

    Reference Design

    DisplayPort & Video Scaler Reference Design

    The Lattice Drive DisplayPort & Video Scaler Reference Design implements easy evaluation of various DisplayPort interface.
    DisplayPort & Video Scaler Reference Design
  • HyperRAM Memory Controller Reference Design

    Reference Design

    HyperRAM Memory Controller Reference Design

    Implements First-Generation HyperRAM Specifications
    HyperRAM Memory Controller Reference Design
  • LVDS Tunneling Protocol and Interface Reference Design

    Reference Design

    LVDS Tunneling Protocol and Interface Reference Design

    The DC-SCM 2.0 LTPI Reference Design provides multiple solution compliant with DC-SCM 2.0 with a standardized DC-SCI and aggregating multiple data channels.
    LVDS Tunneling Protocol and Interface Reference Design
  • RISC-V RX and LPDDR4 Memory Controller Reference Design

    Reference Design

    RISC-V RX and LPDDR4 Memory Controller Reference Design

    RISC-V RX & LPDDR4 Memory Controller Reference Design shows usage of the RISC-V RX soft IP & LPDDR4 memory controller in Lattice Avant™ & CertusPro™ NX.
    RISC-V RX and LPDDR4 Memory Controller Reference Design
  • SSPI Embedded Programming using RPi Reference Design

    Reference Design

    SSPI Embedded Programming using RPi Reference Design

    SSPI Embedded Programming reference design provides several benefits, such as low power consumption and reasonable CPU, GPU, and memory performance.
    SSPI Embedded Programming using RPi Reference Design
  • Page 1 of 9
    First Previous
    1 2 3 4 5 6 7 8 9
    Next Last