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Reference Design
USB to I/O Aggregation and Bridging Reference Design
USB to IO Bridging Reference Design Create plug-and-play peripheral expansion on USB-enabled FPGA & signal protocol conversion from USB to I2C, SPI, & GPIO.
CrossLink-NX
USB
,
USB2
,
USB3
,
I2C
,
SPI
,
JTAG
,
LVDS
,
SLVS
,
FTDI
Reference Design
Object Classification Reference Design
The Object Classification reference design shows examples on implementing machine-learning based object classification to edge devices applications.
CertusPro-NX
,
Avant-E
,
CrossLink-NX
Machine Learning/AI
,
Lattice sensAI
,
Object Detection
,
Object Identification
,
Space
Reference Design
Hand Gesture Detection
Implements a low power AI based system to detect hand gestures using an IR image sensor
iCE40 UltraPlus
Machine Learning/AI
,
Gesture Detection
,
Lattice sensAI
Reference Design
Lattice Sentry Root of Trust Reference Design for MachXO3D
This design utilizes Lattice Sentry IP to help you develop and test a complete NIST 800-193-compliant PFR solution. You can modify to suit your specific needs.
MachXO3D
NIST
,
RISC-V
,
Lattice Propel
,
Lattice Sentry
,
Security
,
Defense
Reference Design
Lattice Sentry Root of Trust Reference Design for Mach-NX
This design utilizes Platform Firmware Resiliency System Root of Trust to help develop and test a complete NIST 800-193 compliant security system that protects, detects, and recovers.
Mach-NX
GPIO Control
,
I2C
,
RISC-V
,
SPI
,
UART
,
NIST
,
Lattice Propel
,
Lattice Sentry
,
Defense
Reference Design
Barcode Detection Reference Design
Exhibits the barcode detection using CertusPro-NX Voice & Vision Machine Learning Board & its camera barcode detection potential based on Yolov5 NN models.
CertusPro-NX
Machine Learning/AI
,
Lattice sensAI
,
Barcode Detection
Reference Design
Lattice ORAN IEEE 1588 PTP Secure Sync Reference Design
Lattice ORAN 1.1 RD shows how to provide ultra-reliable time synchronization & phase alignment for delivering timing accuracy in 5G ORAN networks.
CertusPro-NX
Lattice ORAN
,
PCIe
,
SFP
,
SERDES
,
FMC
,
IEEE1588
Reference Design
Lattice ORAN™ Control Reference Design
Lattice ORAN enable secure out-of-band communication over I3C/SMBus/I2C/PCIe and provide crypto-256 and Crypto-384 services to customers through software APIs.
CertusPro-NX
5G
,
PCIe
,
SPI
,
Lattice ORAN
Reference Design
MPESTI Initiator Reference Design
MPESTI Initiator Reference Design provides the solution template which is compliant with the MPESTI Base Specification.
Avant-E
,
MachXO5-NX
,
MachXO3
,
MachXO3D
MPESTI
,
UART
,
APB
,
AHB
Reference Design
TSEMAC & SGMII Reference Design
Lattice TSEMAC & SGMII Reference Design implements 1G/100M/10M Ethernet application using a TSEMAC IP Core with a SGMII PCS IP Core in loopback mode.
CertusPro-NX
,
CrossLink-NX
Ethernet
,
X/S/RGMII
,
TSEMAC
,
APB
Reference Design
APB to AHB-Lite Bridge Reference Design
The APB to AHB-Lite Bridge Reference Design provides an interface between the low power APB and the high-speed AHB-Lite.
MachXO3D
,
MachXO3
,
MachXO2
APB
,
AHB
,
AMBA
Reference Design
DisplayPort & Video Scaler Reference Design
The Lattice Drive DisplayPort & Video Scaler Reference Design implements easy evaluation of various DisplayPort interface.
CertusPro-NX
Lattice Drive
,
DisplayPort
,
Video Scaling
,
FMC
Reference Design
LVDS Tunneling Protocol and Interface Reference Design
The DC-SCM 2.0 LTPI Reference Design provides multiple solution compliant with DC-SCM 2.0 with a standardized DC-SCI and aggregating multiple data channels.
MachXO5-NX
,
MachXO3D
,
MachXO3
,
Mach-NX
CRC
,
LVDS
,
I2C
,
GPIO
,
UART
,
LTPI
,
AMBA
,
APB
,
Lattice Diamond
,
Lattice Propel
Reference Design
RISC-V RX and LPDDR4 Memory Controller Reference Design
RISC-V RX & LPDDR4 Memory Controller Reference Design shows usage of the RISC-V RX soft IP & LPDDR4 memory controller in Lattice Avant™ & CertusPro™ NX.
Avant-E
,
CertusPro-NX
RISC-V
,
LPDDR4
,
AXI4
,
SDRAM
,
IEEE 1149.1
,
Lattice Propel
Reference Design
Single Wire Signal Aggregation Reference Design
Single Wire Signal Aggregation Reference Design is configurable, the number of I2C/I2S busses and GPIOs and single wire protocol packet length can be adjusted.
iCE40 UltraPlus
Bus Controllers
,
Signal Aggregation
,
Single Wire
,
Defense
Reference Design
I2C to APB Bridge Reference Design
With support APB read / write capability, the I2C to APB Bridge Reference Design converts external I2C Master into APB Master transaction.
MachXO2
,
MachXO3
,
MachXO3D
I2C
,
APB
,
AMBA
,
AHB
Reference Design
Key Phrase Detection
Continuous searches for a key phrase utterance via a digital MEMS microphone. Can be re-configured to work with any trained word or phrase.
iCE40 UltraPlus
Audio AI
,
Machine Learning/AI
,
Lattice sensAI
,
Home Control Appliances & Security
,
IoT & Wearables
,
Notebooks & PCs
,
Printers
,
Smart Toys & Robots
,
Tablets
Reference Design
Human Face Identification Reference Design
Uses a Convolutional Neural Network in the ECP5 FPGA to detect a human face, and match to known registered faces. Can be adapted to work with any other object.
ECP5 / ECP5-5G
,
CertusPro-NX
,
CrossLink-NX
Object Detection
,
Object Identification
,
Lattice sensAI
,
Home Control Appliances & Security
,
IoT & Wearables
,
Notebooks & PCs
,
Printers
,
Smart Toys & Robots
,
Tablets
,
UAVs
Reference Design
Human Presence Detection
Uses Lattice sensAI IP to continuously search for the presence of a human and reports results. Can be adapted to detect any other object.
iCE40 UltraPlus
Machine Learning/AI
,
Object Detection
,
Lattice sensAI
,
Home Control Appliances & Security
,
IoT & Wearables
,
Notebooks & PCs
,
Printers
,
Smart Toys & Robots
,
Tablets
,
Defense
Reference Design
Object Counting AI
An example object counting application based on the Lattice sensAI stack. Includes SPI, DDR IP blocks, ISP engine, 8 CNN engines and a counting / overlay engine
ECP5 / ECP5-5G
,
CrossLink-NX
Machine Learning/AI
,
Lattice sensAI
,
Object Counting
,
AR / VR & Drones
,
Home Control Appliances & Security
,
IoT & Wearables
,
Notebooks & PCs
,
Printers
,
Smart Toys & Robots
,
Tablets
,
Defense
,
Automotive
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