Lattice Solutions

Everything you need to quickly and easily complete your design

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Providers
  • Key Phrase Detection

    Reference Design

    Key Phrase Detection

    Continuous searches for a key phrase utterance via a digital MEMS microphone. Can be re-configured to work with any trained word or phrase.
    Key Phrase Detection
  • Human Face Identification

    Reference Design

    Human Face Identification

    Uses a Convolutional Neural Network in the ECP5 FPGA to detect a human face, and match to known registered faces. Can be adapted to work with any other object.
    Human Face Identification
  • Human Presence Detection

    Reference Design

    Human Presence Detection

    Uses Lattice sensAI IP to continuously search for the presence of a human and reports results. Can be adapted to detect any other object.
    Human Presence Detection
  • Object Counting

    Reference Design

    Object Counting

    An example object counting application based on the Lattice sensAI stack. Includes SPI, DDR IP blocks, ISP engine, 8 CNN engines and a counting / overlay engine
    Object Counting
  • MIPI CSI-2 Virtual Channel Aggregation

    Reference Design

  • MIPI DSI/CSI-2 to OpenLDI LVDS Interface Bridge

    Reference Design

    MIPI DSI/CSI-2 to OpenLDI LVDS Interface Bridge

    Modular MIPI/D-PHY Reference Design - Complete solution integrates the Byte to Pixel Converter, CSI-2/DSI D-PHY Receiver and FPD-LINK (OpenLDI) Transmitter
    MIPI DSI/CSI-2 to OpenLDI LVDS Interface Bridge
  • N Input to 1 Output MIPI CSI-2 Side-by-Side Aggregation

    Reference Design

  • SubLVDS to MIPI CSI-2 Image Sensor Bridge

    Reference Design

    SubLVDS to MIPI CSI-2 Image Sensor Bridge

    Modular MIPI/D-PHY Reference Design - Complete solution integrates the Pixel to Byte Converter, SubLVDS Image Sensor Recevier and CSI-2/DSI D-PHY Transmitter
    SubLVDS to MIPI CSI-2 Image Sensor Bridge
  • Single Wire Aggregation

    Reference Design

    Single Wire Aggregation

    Use a low-cost FPGA to aggregate multiple data streams such as I2C, UART, I2S and GPIO in TDM fashion, transmit a over single wire, and de-aggregate.
    Single Wire Aggregation
  • MachXO3D ESB Implementing AES128/AES256 Encryption and Decryption

    Reference Design

    MachXO3D ESB Implementing AES128/AES256 Encryption and Decryption

    Shows how to use the MachXO3D Embedded Security Block (ESB) to implement AES128 or AES256 encryption or decryption.
    MachXO3D ESB Implementing AES128/AES256 Encryption and Decryption
  • I2C Bus Master

    Reference Design

    I2C Bus Master

    Demonstrates how a fast and configurable I2C-Bus Master Controller can be constructed and utilized in a Lattice CPLD/FPGA device
    I2C Bus Master
  • I2C Master - WISHBONE Compatible

    Reference Design

    I2C Master - WISHBONE Compatible

    Based on the OpenCores I2C master core, this Reference Design provides a bridge between the I2C and WISHBONE bus
    I2C Master - WISHBONE Compatible
  • PDM Microphone Aggregation

    Reference Design

    PDM Microphone Aggregation

    Aggregate up to 8 PDM microphones and connection to a processor over I2S or SPI with no impact in audio quality. Ideal for beam-forming. PCM output at 48HKz.
    PDM Microphone Aggregation
  • Image Sensor Bridge

    Reference Design

    Image Sensor Bridge

    Interfaces a CMOS camera to a Digital Video Port (DVP) for a low-power low-footprint solution.
    Image Sensor Bridge
  • Infrared Remote Tx/Rx Reference Designs

    Reference Design

    Infrared Remote Tx/Rx Reference Designs

    Implements an interface to IR receive and/or IR transmit. This includes PWM (pulse width modulation) timing and protocol conversion to an SPI /I2C bus
    Infrared Remote Tx/Rx Reference Designs
  • Long Range (LoRa) Wireless

    Reference Design

    Long Range (LoRa) Wireless

    Implement a LoRa compliant device using a tiny iCE40 UltraPlus FPGA, for low-power, low-footprint wireless communication over miles
    Long Range (LoRa) Wireless
  • Graphics Acceleration

    Reference Design

    Graphics Acceleration

    Enables a processor to save power in sleep mode while the low-power iCE40 UltraPlus drives a mobile DSI display, and monitors for wake-up signals.
    Graphics Acceleration
  • RGB LED Reference Design

    Reference Design

    RGB LED Reference Design

    A complete RGB LED design that controls the color, blinking rate, brightness and breathing of an RGB LED.
    RGB LED Reference Design
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