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  • Scene Segmentation Reference Design

    Reference Design

    Scene Segmentation Reference Design

    Efficient and low power approach for implementing scene segmentation using Lattice CrossLink-NX FPGA
    Scene Segmentation Reference Design
  • CertusPro-NX Versa Board

    Board

    CertusPro-NX Versa Board

    CertusPro-NX Versa Board supports a wide range industry standards such as MIPI, SFP+, 10 GbE, LPDDR4 and PCIe (Gen3) for rapid prototyping and testing.
    CertusPro-NX Versa Board
  • Embedded Vision Development Kit

    Board

    Embedded Vision Development Kit

    Three-board Video Interface Platform (VIP) modular kit. Includes 2 MIPI/D-PHY camera input, FPGA processing, HDMI output. More Input/Output boards available.
    Embedded Vision Development Kit
  • Object Classification Demonstration

    Demo

    Object Classification Demonstration

    Sample demonstration for object detection, classification, and tracking multiple objects running on a low power general purpose FPGA using CNN Model
    Object Classification Demonstration
  • Object Classification Reference Design

    Reference Design

    Object Classification Reference Design

    A reference design for implementing object classification based on Mobilenet NN model running on Lattice CertusPro-NX low power FPGA
    Object Classification Reference Design
  • PCIe Basic Demo on Crosslink-NX PCIe Bridge Board

    Demo

    PCIe Basic Demo on Crosslink-NX PCIe Bridge Board

    The PCIe Basic Demo allows you to control three 7 segment LEDs and manipulate the onboard memory of the FPGA through the PCIe slot.
    PCIe Basic Demo on Crosslink-NX PCIe Bridge Board
  • PCIe Colorbar Demo for Lattice Nexus-based FPGAs

    Demo

    PCIe Colorbar Demo for Lattice Nexus-based FPGAs

    Demo that displays a series of moving colorbars by streaming the image data using DMA transfers from the FPGA to the host system.
    PCIe Colorbar Demo for Lattice Nexus-based FPGAs
  • PCIe DMA Throughput Demo for Lattice Nexus-based FPGAs

    Demo

    PCIe DMA Throughput Demo for Lattice Nexus-based FPGAs

    The PCI Express DMA Throughput Demo allows to initiate DMA read and write transactions, transferring data from the host to the FPGA and vice versa.
    PCIe DMA Throughput Demo for Lattice Nexus-based FPGAs
  • PCIe Multifunction Demo for Lattice Nexus-based FPGAs

    Demo

    PCIe Multifunction Demo for Lattice Nexus-based FPGAs

    Demonstrates the multifunction capabilities of the Crosslink-NX FPGA that allows access to GPIO, MDIO and I2C registers.
    PCIe Multifunction Demo for Lattice Nexus-based FPGAs
  • User Tracking and Onlooker Detection Demostration

    Demo

    User Tracking and Onlooker Detection Demostration

    Sample demonstration for detection and tracking of multiple human faces running on a low power general purpose FPGA using CNN Model
    User Tracking and Onlooker Detection Demostration
  • CrossLink-NX Voice and Vision Machine Learning Board

    Board

    CrossLink-NX Voice and Vision Machine Learning Board

    Designed for low-power machine learning applications with Lattice sensAI and CrossLink-NX. Includes image sensors, microphones, HyperRAM, and expansion ports.
    CrossLink-NX Voice and Vision Machine Learning Board
  • CrossLink-NX-33 Voice and Vision Machine Learning Board

    Board

    CrossLink-NX-33 Voice and Vision Machine Learning Board

    Designed for low-power machine learning applications with Lattice sensAI and CrossLink-NX-33. Includes expansion ports and audio-based AI applications tools.
    CrossLink-NX-33 Voice and Vision Machine Learning Board
  • Hand Gesture Detection

    Reference Design

    Hand Gesture Detection

    Implements a low power AI based system to detect hand gestures using an IR image sensor
    Hand Gesture Detection
  • Lattice Sentry I2C Filter IP Core

    IP Core

    Lattice Sentry I2C Filter IP Core

    SMBus relay with I2C filter and provides 4 interface to protect malicious traffic.
    Lattice Sentry I2C Filter IP Core
  • Lattice Sentry PLD Interface IP Core

    IP Core

    Lattice Sentry PLD Interface IP Core

    Lattice Semiconductor Customer Programmable Logic Devices (PLD)implements a bidirectional mailbox for sending and receiving messages.
    Lattice Sentry PLD Interface IP Core
  • Lattice Sentry SMBus Mailbox IP Core

    IP Core

    Lattice Sentry SMBus Mailbox IP Core

    SMBus, a two-wire interface that support fairness arbitration and compatible with AHB-Lite specification. Target devices are Mach-NX and MachXO3D.
    Lattice Sentry SMBus Mailbox IP Core
  • PIC IP Core

    IP Core

    PIC IP Core

    Lattice Semiconductor PIC soft IP with configurable 1~8 interrupt inputs and 32-bit AHB-L interface for Mach-NX FPGA
    PIC IP Core
  • SFB Interface IP Core

    IP Core

    SFB Interface IP Core

    SFB allow access to AHB-L CPLD block , management CPU recovery circuit and Flash sector for read/write.
    SFB Interface IP Core
  • Timer/Counter IP Core

    IP Core

    Timer/Counter IP Core

    Timer/Counter IP used to track timeouts in the system. Target devices are Certus-NX and Crosslink-NX.
    Timer/Counter IP Core
  • Lattice Sentry Demo Board for Mach-NX

    Board

    Lattice Sentry Demo Board for Mach-NX

    A complete platform to help you develop and test a NIST 800-193-compliant PFR solution. Includes numerous features to enable debug, interface and expansion
    Lattice Sentry Demo Board for Mach-NX
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