LatticeXP2

Get flexible, get flexiFLASH

Related Products

The logical choice – LatticeXP2 devices combine up to 40 K LUTs with non-volatile Flash cells to enable instant-on performance across a feature-set optimized for high-volume, low cost applications

Never fear, FlashBAK™ is here – Backup data from the embedded block RAMs to Flash memory on command and prevent data loss on system power-down.

Configure, reconfigure, repeat – The LatticeXP2 family supports live update technology with TransFR™ and secure 128-bit AES Encryption as well as dual-boot technologies.

Features

  • Up to 885 Kbits sysMEM™ embedded block RAM and up to 83 Kbits distributed RAM
  • sysCLOCK™ PLLs up to four analog PLLs per device that enable clock multiply, divide and phase shifting
  • Three to eight sysDSP blocks for high performance multiply and accumulate.
  • Pre-engineered source synchronous IOs for DDR/DDR2 up to 200 MHz and 7:1 LVDS interface support up to 600 Mbps
  • Available in csBGA, TQFP, PQFP and BGA packaging

Jump to

Family Table

LatticeXP2 Device Selection Guide

PARAMETERS XP2-5 XP2-8 XP2-17 XP2-30 XP2-40
LUTs (K) 5 8 17 29 40
EBR SRAM Blocks 9 12 15 21 48
EBR SRAM (Kbits) 166 221 276 387 885
Distributed RAM (Kbits) 10 18 35 56 83
sysDSP Blocks 3 4 5 7 8
18x18 Multipliers 12 16 20 28 32
PLL + DLL 2 + 2 2 + 2 4 + 2 4 + 2 4 + 2
DDR Support (Mbps) DDR/2 400 DDR/2 400 DDR/2 400 DDR/2 400 DDR/2 400
Configuration Memory Internal Flash Internal Flash Internal Flash Internal Flash Internal Flash
Dual Boot1 Yes Yes Yes Yes Yes
Bit-stream Encryption Yes Yes Yes Yes Yes
Core Vcc 1.2 V Yes Yes Yes Yes Yes
Temp C Yes Yes Yes Yes Yes
Temp I Yes Yes Yes Yes Yes
Temp AEC-Q100 Yes Yes Yes    
0.5 mm Spacing I/O Count
  XP2-5 XP2-8 XP2-17 XP2-30 XP2-40
132-pin csBGA (8 x 8 mm) 86 86      
144-pin TQFP (20 x 20 mm) 100 100      
208-Pin PQFP (28 x 28 mm) 146 146 146    
1.0 mm Spacing I/O Count
  XP2-5 XP2-8 XP2-17 XP2-30 XP2-40
256-ball ftBGA (17 x 17 mm) 172 201 201 201  
484-ball fpBGA (23 x 23 mm)     358 363 363
672-ball fpBGA (27 x 27 mm)       472 540

1. Dual Boot Supported with external boot Flash.

Lattice Automotive (AEC-Q100 qualified) LatticeXP2 Device Selection Guide

Parameters LA-XP2-5 LA-XP2-8 LA-XP2-17
LUTs (K) 5 8 17
Distributed RAM (Kbits) 10 18 35
EBR SRAM (Kbits) 166 221 276
EBR SRAM Blocks (9 Kbits) 9 12 15
sysDSP Blocks 3 4 5
18 x 18 Multipliers 12 16 20
VCC Voltage 1.2 1.2 1.2
GPLL 2 2 4
Maximum Available I/O 172 201 201
0.5 mm Spacing I/O Count

LA-XP2-5 LA-XP2-8 LA-XP2-17
132-pin csBGA (8 x 8 mm) 86 86  
144-pin TQFP (20 x 20 mm) 100 100  
1.0 mm Spacing I/O Count

LA-XP2-5 LA-XP2-8 LA-XP2-17
208-ball PQFP (28 x 28 mm) 146 146 146
256-ball ftBGA (17 x 17 mm) 172 201 201

Design Resources

Intellectual Property & Reference Designs

Simplify your design efforts by using pre-tested, reusable functions

Software

Complete Design Flows, High Ease of Use

Development Kits & Boards

Our development boards & kits help streamline your design process

Programming Hardware

Take the strain out of in-system programming & in-circuit reconfiguration with our programming hardware

Documentation

To subscribe, or modify your subscription, to Document Notifications please login to your Lattice account

Quick Reference
Technical Resources
Information Resources
Downloads
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
Package Diagrams
FPGA-DS-02053 8.2 9/22/2024 PDF 9 MB
High-Speed PCB Design Considerations
FPGA-TN-02178 6.4 8/21/2024 PDF 3.5 MB
LatticeXP2 sysCONFIG Usage Guide
TN1141 2.0 1/9/2014 PDF 1.3 MB
LatticeXP2 High-Speed I/O Interface
TN1138 1.5 3/27/2017 PDF 5 MB
LatticeXP2 Memory Usage Guide
FPGA-UG-02080 2.3 3/29/2021 PDF 2.9 MB
LatticeXP2 sysIO Usage Guide
TN1136 1.3 6/28/2010 PDF 811.1 KB
LatticeXP2 Configuration Encryption and Security Usage Guide
TN1142 1.2 5/1/2008 PDF 893.2 KB
LatticeXP2 Hardware Checklist Technical Note
TN1143 1.3 9/18/2013 PDF 356.9 KB
LatticeXP2 Advanced Security Programming Usage Guide
TN1212 1.0 11/29/2010 PDF 1.1 MB
LatticeXP2 sysDSP Usage Guide
TN1140 1.0 2/1/2007 PDF 1.2 MB
LatticeXP2 Slave SPI Port Usage Guide
TN1213 1.2 6/5/2012 PDF 2.7 MB
LatticeXP2 sysCLOCK PLL Design and Usage Guide
FPGA-TN-02092 1.4 9/30/2012 PDF 1.1 MB
LatticeXP2 Dual Boot Feature
TN1220 1.1 8/27/2012 PDF 1.5 MB
LatticeXP2 Soft Error Detection (SED) Usage Guide
FPGA-TN-02253 2.2 5/14/2021 PDF 706.4 KB
LA-LatticeXP2 Automotive Family Data Sheet
DS1024 1.5 2/28/2015 PDF 6.5 MB
LatticeXP2 Family Data Sheet
FPGA-DS-02088 2.5 8/21/2021 PDF 4.2 MB
LatticeXP2 Family Data Sheet (Japanese Language Version)
DS1009J 1.8 9/6/2012 PDF 5.1 MB
Wafer-Level Chip-Scale Package Guide
FPGA-TN-02312 1.1 6/23/2022 PDF 236.5 KB
Minimizing System Interruption During Configuration Using TransFR Technology
FPGA-TN-02198 4.4 10/17/2023 PDF 1.4 MB
Sub-LVDS Signaling Using Lattice Devices
FPGA-TN-02028 2.5 10/9/2023 PDF 540.2 KB
Solder Reflow Guide for Surface Mount Devices
FPGA-TN-02041 4.9 9/23/2024 PDF 878.5 KB
PCB Layout Recommendations for BGA Packages
FPGA-TN-02024 5.4 8/27/2024 PDF 6.7 MB
Power Estimation and Management for LatticeXP2 Devices Technical Note
TN1139 1.0 2/1/2007 PDF 1.2 MB
Power Decoupling and Bypass Filtering for Programmable Devices
FPGA-TN-02115 1.1 1/26/2022 PDF 708.9 KB
Thermal Management
FPGA-TN-02044 5.2 8/21/2024 PDF 756 KB
LatticeXP2 256 ftBGA Migration
1.0 2/29/2008 CSV 19.5 KB
LatticeXP2 132 csBGA Migration
1.0 2/29/2008 CSV 5.8 KB
LatticeXP2 672 fpBGA Migration
1.0 8/19/2008 CSV 28.9 KB
LatticeXP2 144 TQFP Migration
1.0 2/29/2008 CSV 6.3 KB
LatticeXP2 484 fpBGA Migration
1.0 2/29/2008 CSV 28.6 KB
LatticeXP2-8 Pinout
Note: a pin out file can be exported from Diamond version 1.3 or above. 		1.1a 8/10/2011 CSV 13.3 KB
LatticeXP2-5 Pinout
Note: a pin out file can be exported from Diamond version 1.3 or above. 		1.1a 8/10/2011 CSV 12.1 KB
LatticeXP2 208 PQFP Migration
1.0 2/29/2008 CSV 12.8 KB
LatticeXP2-40 Pinout
Note: a pin out file can be exported from Diamond version 1.3 or above. 		1.1a 8/10/2011 CSV 25.3 KB
LatticeXP2-30 Pinout
Note: a pin out file can be exported from Diamond version 1.3 or above. 		1.1 8/10/2011 CSV 26.9 KB
LatticeXP2-17 Pinout
Note: a pin out file can be exported from Diamond version 1.3 or above. 		1.1a 8/10/2011 CSV 20.1 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
LA-LatticeXP2 Automotive Family Data Sheet
DS1024 1.5 2/28/2015 PDF 6.5 MB
LatticeXP2 Family Data Sheet
FPGA-DS-02088 2.5 8/21/2021 PDF 4.2 MB
LatticeXP2 Family Data Sheet (Japanese Language Version)
DS1009J 1.8 9/6/2012 PDF 5.1 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
High-Speed PCB Design Considerations
FPGA-TN-02178 6.4 8/21/2024 PDF 3.5 MB
High-Speed PCB Design Considerations (Chinese Language Version)
TN1033C 06.1 5/23/2011 PDF 434.6 KB
LatticeXP2 sysCONFIG Usage Guide
TN1141 2.0 1/9/2014 PDF 1.3 MB
LatticeXP2 High-Speed I/O Interface
TN1138 1.5 3/27/2017 PDF 5 MB
LatticeXP2 Memory Usage Guide
FPGA-UG-02080 2.3 3/29/2021 PDF 2.9 MB
LatticeXP2 sysCLOCK PLL Design and Usage Guide (Japanese Language Version)
TN1126 01.0 1/23/2009 PDF 844.3 KB
LatticeXP2 Dual Boot Feature
TN1220J 1.0 5/22/2013 PDF 802.6 KB
LatticeXP2 sysIO Usage Guide
TN1136 1.3 6/28/2010 PDF 811.1 KB
LatticeXP2 Configuration Encryption and Security Usage Guide
TN1142 1.2 5/1/2008 PDF 893.2 KB
LatticeXP2 Hardware Checklist Technical Note
TN1143 1.3 9/18/2013 PDF 356.9 KB
LatticeXP2 sysIO Usage Guide (Japanese Language Version)
TN1136 01.1 1/18/2009 PDF 307.1 KB
LatticeXP2 sysCONFIG Usage Guide (Japanese Language Version)
TN1141 01.4 1/20/2009 PDF 291.6 KB
LatticeXP2 Advanced Security Programming Usage Guide
TN1212 1.0 11/29/2010 PDF 1.1 MB
LatticeXP2 sysDSP Usage Guide
TN1140 1.0 2/1/2007 PDF 1.2 MB
LatticeXP2 Memory Usage Guide (Japanese Language Version)
TN1137 01.7 2/15/2009 PDF 1.9 MB
LatticeXP2 High-Speed I/O Interface (Japanese Language Version)
TN1138 01.1 1/18/2009 PDF 1.4 MB
LatticeXP2 Slave SPI Port Usage Guide
TN1213 1.2 6/5/2012 PDF 2.7 MB
LatticeXP2 sysCLOCK PLL Design and Usage Guide
FPGA-TN-02092 1.4 9/30/2012 PDF 1.1 MB
LatticeXP2 Dual Boot Feature
TN1220 1.1 8/27/2012 PDF 1.5 MB
LatticeXP2 Soft Error Detection (SED) Usage Guide
FPGA-TN-02253 2.2 5/14/2021 PDF 706.4 KB
LatticeXP2 sysDSP Usage Guide (Japanese Language Version)
TN1140 01.0 1/17/2009 PDF 1.2 MB
Wafer-Level Chip-Scale Package Guide
FPGA-TN-02312 1.1 6/23/2022 PDF 236.5 KB
Minimizing System Interruption During Configuration Using TransFR Technology
FPGA-TN-02198 4.4 10/17/2023 PDF 1.4 MB
Sub-LVDS Signaling Using Lattice Devices
FPGA-TN-02028 2.5 10/9/2023 PDF 540.2 KB
Solder Reflow Guide for Surface Mount Devices
FPGA-TN-02041 4.9 9/23/2024 PDF 878.5 KB
PCB Layout Recommendations for BGA Packages
FPGA-TN-02024 5.4 8/27/2024 PDF 6.7 MB
Power Estimation and Management for LatticeXP2 Devices Technical Note
TN1139 1.0 2/1/2007 PDF 1.2 MB
Power Decoupling and Bypass Filtering for Programmable Devices
FPGA-TN-02115 1.1 1/26/2022 PDF 708.9 KB
Thermal Management
FPGA-TN-02044 5.2 8/21/2024 PDF 756 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
Package Diagrams
FPGA-DS-02053 8.2 9/22/2024 PDF 9 MB
LatticeXP2 256 ftBGA Migration
1.0 2/29/2008 CSV 19.5 KB
LatticeXP2 132 csBGA Migration
1.0 2/29/2008 CSV 5.8 KB
LatticeXP2 672 fpBGA Migration
1.0 8/19/2008 CSV 28.9 KB
LatticeXP2 144 TQFP Migration
1.0 2/29/2008 CSV 6.3 KB
LatticeXP2 484 fpBGA Migration
1.0 2/29/2008 CSV 28.6 KB
LatticeXP2-8 Pinout
Note: a pin out file can be exported from Diamond version 1.3 or above. 		1.1a 8/10/2011 CSV 13.3 KB
LatticeXP2-5 Pinout
Note: a pin out file can be exported from Diamond version 1.3 or above. 		1.1a 8/10/2011 CSV 12.1 KB
LatticeXP2 208 PQFP Migration
1.0 2/29/2008 CSV 12.8 KB
LatticeXP2-40 Pinout
Note: a pin out file can be exported from Diamond version 1.3 or above. 		1.1a 8/10/2011 CSV 25.3 KB
LatticeXP2-30 Pinout
Note: a pin out file can be exported from Diamond version 1.3 or above. 		1.1 8/10/2011 CSV 26.9 KB
LatticeXP2-17 Pinout
Note: a pin out file can be exported from Diamond version 1.3 or above. 		1.1a 8/10/2011 CSV 20.1 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
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PCI IP Core User's Guide
PCI Core User Guide for LatticeSC, LatticeECP3, LatticeECP2/M, LatticeECP/EC, LatticeXP, Mach XO, and MachXO2 		IPUG18 9.2 11/8/2010 PDF 4.6 MB
LatticeXP2 Advanced Evaluation Board User's Guide
Describes the features and function of the LatticeXP2 Advanced Evaluation Board. Includes Schematics. 		EB30 01.5 3/11/2011 PDF 2.2 MB
LatticeXP2 Brevia 2 Development Kit User's Guide
EB67 1.0 11/18/2011 PDF 1.6 MB
LatticeXP2 Standard Evaluation Board User Manual
Describes the features and functionality of the LatticeXP2 Standard Evaluation Board 		EB29 01.5 2/11/2010 PDF 1.7 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
WISHBONE UART - Source Code
RD1042 1.6 12/1/2014 ZIP 58.5 MB
Simple Sigma-Delta ADC, Documentation
FPGA-RD-02047 1.6 1/30/2020 PDF 971 KB
WISHBONE UART - Documentation
FPGA-RD-02137 1.7 2/5/2021 PDF 1.1 MB
SD Flash Controller - Documentation
RD1048 1.1 1/29/2010 PDF 1.7 MB
Simple Sigma-Delta ADC - Source Code
1.5 9/26/2018 ZIP 1.5 MB
HDLC Controller for FPGAs - Documentation
RD1038 01.1 9/4/2008 PDF 1.1 MB
GPIO Expander, Documentation
RD1065 1.3 4/12/2011 PDF 280.6 KB
GPIO Expander, Source Code
RD1065 1.3 4/12/2011 ZIP 195.5 KB
Fast Page Mode SDRAM Controller - Documentation
FPGA-RD-02090 2.4 1/22/2021 PDF 887.1 KB
Fast Page Mode SDRAM Controller - Source Code
RD1014 2.3 11/8/2010 ZIP 110.4 KB
I2C Master with WISHBONE Bus Interface - Source Code
RD1046 1.8 2/1/2016 ZIP 1.4 MB
I2C Controller for Serial EEPROMs - Documentation
RD1006 2.6 3/5/2014 PDF 767.9 KB
I2C (Inter-Integrated Circuit) Master Controller - Source Code
RD1005 5.9 1/10/2015 ZIP 809.7 KB
I2C Controller for Serial EEPROMs - Source Code
RD1006 2.7 1/12/2015 ZIP 613.5 KB
I2C Master with WISHBONE Bus Interface - Documentation
RD1046 1.6 1/15/2015 PDF 1.4 MB
HDLC Controller for FPGAs - Source Code
RD1038 1.0 9/4/2008 ZIP 1.2 MB
I2C (Inter-Integrated Circuit) Master Controller - Documentation
RD1005 5.8 3/6/2014 PDF 987.4 KB
Parallel to MIPI DSI TX Bridge - Source Code
RD1184 1.5 1/1/2015 ZIP 2.6 MB
BSCAN2 - Multiple Scan Port Linker - Documentation
FPGA-RD-02106 4.9 1/29/2021 PDF 918.1 KB
8b/10b Encoder/Decoder - Source Code
1.4 1/29/2021 ZIP 1.9 MB
BSCAN1 - Multiple Boundary Scan Port Addressable Buffer - Source Code
RD1001 7.3 4/18/2011 ZIP 152.4 KB
BSCAN2 - Multiple Boundary Scan Port Linker - Source Code
RD1002 4.6 3/13/2014 ZIP 2.6 MB
CompactFlash Controller - Documentation
FPGA-RD-02088 1.4 1/22/2021 PDF 1.7 MB
BSCAN1 - Multiple Boundary Scan Port Addressable Buffer - Documentation
FPGA-RD-02105 7.4 1/29/2021 PDF 993.7 KB
Arbitration and Switching Between Bus Masters - Documentation
FPGA-RD-02104 1.2 1/21/2021 PDF 952.5 KB
8b/10b Encoder/Decoder - Documentation
FPGA-RD-02103 1.5 1/29/2021 PDF 940.3 KB
Control Link Serial Interface - Documentation
FPGA-RD-02089 1.5 1/22/2021 PDF 810.2 KB
CompactFlash Controller - Source Code
RD1040 1.4 11/8/2010 ZIP 1.5 MB
Control Link Serial Interface - Source Code
RD1051 1.4 11/8/2010 ZIP 240.7 KB
Parallel to MIPI CSI-2 TX Bridge - Source Code
RD1183 1.5 1/1/2015 ZIP 1.2 MB
Arbitration and Switching Between Bus Masters - Source code
RD1067 1.1 2/22/2010 ZIP 284 KB
Power Supply Fault Logging - Source Code
RD1062 1.2 6/30/2010 ZIP 123.4 KB
Parallel to MIPI DSI TX Bridge - Documentation
FPGA-RD-02133 1.6 1/31/2021 PDF 1.2 MB
NAND Flash Controller Design - Documentation
FPGA-RD-02095 1.3 1/22/2021 PDF 1.6 MB
Power Supply Fault Logging - Documentation
RD1062 1.2 6/30/2010 PDF 127.8 KB
PCI Target 32-bit/33MHz
FPGA-RD-02134 3.6 1/31/2021 PDF 1.8 MB
Parallel to MIPI CSI-2 TX Bridge - Documentation
FPGA-RD-02132 1.6 8/19/2021 PDF 1.1 MB
RGMII to GMII Bridge Reference Design
FPGA-RD-02136 2.5 6/23/2021 PDF 762.7 KB
PCI to NOR Flash Interface
RD1050 1.1 3/10/2010 PDF 367.9 KB
RGMII to GMII Bridge - Source Code
FPGA-RD-02136 6/23/2021 ZIP 968.6 KB
PCI/WISHBONE Bridge
FPGA-RD-02135 1.4 2/5/2021 PDF 1.2 MB
PWM Fan Controller
RD1060 1.6 9/10/2014 PDF 481.5 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
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Courtesy Notification of Additional Ejector Pin Sites on Select BGA Packages
5/22/2013 PDF 252.9 KB
PCN05A-17 Halogen-Free substrate at ASEM
1.2 10/27/2017 PDF 268 KB
PCN05A-17 Affected Parts List
1.0 1/1/0001 XLSX 14.9 KB
PCN 09A-12 Customer Characterization Report
PCN09A-12 1.0 5/14/2012 PDF 551.7 KB
PCN 09A-12 Affected Devices
Assembly Site 		PCN09A-12 1.0 5/14/2012 XLSX 121 KB
PCN02B-12 Notification of a Revision to the LatticeXP2, LA-LatticeXP2 and LatticeECP2/M Data Sheets
Data Sheet 		PCN02B-12 1.0 2/6/2012 PDF 181.6 KB
PCN 09A-12 Alternate Qualified Material Set, Assembly Site for Select Lattice Families
PCN09A-12 1.0 5/14/2012 PDF 160.2 KB
PCN 09A-12 Material Set Changes
Assembly Site 		PCN09A-12 1.0 5/14/2012 XLSX 121 KB
PCN 09A-12 Frequently Asked Questions
PCN09A-12 1.0 5/11/2012 PDF 178.9 KB
PCN03A-13 Device Characterization Report
PCN03A-13 6/28/2013 PDF 981.3 KB
PCN 03B13 Alternate Qualified Assembly Test Site Alternate Qualified Material Sets ASE Taiwan
Assembly Site, Material Set 		PCN03B 1.0 11/14/2014 PDF 229.6 KB
PCN03A-13 FAQs
PCN03A-13 6/28/2013 PDF 458.3 KB
PCN03B-13 Affected Part Number and Material Sets
PCN03B-13 6/28/2013 XLSX 69 KB
PCN08A13_AffectedDevices
Other 		PCN08A-13 1 9/26/2013 XLSX 78.2 KB
PCN03A-13 Alternate Qualified Assembly and Material Sets for Select Devices
PCN03A-13 6/28/2013 PDF 202.5 KB
PCN03A-14 Characterization Report
PCN03A-14 1.0 4/4/2014 PDF 919.5 KB
PCN06A-14 Affected Device List
PCN06A-14 1.0 10/3/2014 XLSX 45.1 KB
PCN06A-14 Material Set Table
PCN06A-14 1.0 10/3/2014 XLSX 13.7 KB
PCN06A-14 Characterization Report
PCN06A-14 1.0 10/3/2014 PDF 563.7 KB
PCN06B-14 Notification of Intent to Utilize an Alternate Qualified Assembly Site/Test Site and Alternate Qualified Material Sets for Select Lattice Products
PCN06B-14 1.0 11/21/2014 PDF 229.5 KB
PCN03A-14 FAQ
PCN03A-14 1.0 4/4/2014 PDF 452.5 KB
PCN03A-14 Material Set Table
PCN03A-14 1.0 4/4/2014 XLSX 26.9 KB
PCN03A-14 Affected Part Number List
PCN03A-14 1.0 4/4/2014 XLSX 60 KB
PCN03B-14 Notification of Intent to Utilize an Alternate Qualified Assembly Site/Test Site and/or Alternate Qualified Material Sets for Select Lattice Products
PCN03B-14 1.0 11/21/2014 PDF 229.9 KB
PCN06C-11 Withdrawal of PCN06B-11
Material Set 		PCN06C-11 1.0 8/1/2011 PDF 838.5 KB
ACN03D-11 Withdrawal of ACN03C-11
Material Set 		ANC03D-11 1 4/1/2011 PDF 796.6 KB
PCN07C-11 Withdrawal of PCN07B-11
Material Set 		PCN07C-11 1.0 8/1/2011 PDF 917.9 KB
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Lattice OrCAD Capture Schematic Library (OLB)
This file contains an OrCAD Capture Schematic Library (OLB file type) for all Lattice products. This .zip file also includes a .xls worksheet with a list of the contents of the OLB. These symbols can be used to help with OrCAD schematic designs. 		FPGA-SC-02005 8.2 8/8/2024 ZIP 2.6 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
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Product Selector Guide
I0211 46.0 7/18/2024 PDF 9.7 MB
LatticeXP2 FPGA Family Product Brief (Chinese)
I0192C 2.0 6/1/2010 PDF 1.8 MB
Automotive Solutions Product Brief
I0164 8.0 6/5/2009 PDF 2.4 MB
LatticeXP2 FPGA Family Product Brief
I0192 3.0 4/24/2012 PDF 2.4 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
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FTN256_LAXP2_LAMXO
Rev H1 6/9/2022 PDF 141.3 KB
TN_TG_TQ144 Cu_wire all
Rev E1 12/21/2021 PDF 107.1 KB
QN_YN208
Rev E1 12/21/2021 PDF 21.9 KB
FN672
Rev L1 6/8/2022 PDF 154.1 KB
MN132_Cu_all
Rev R1 6/21/2022 PDF 149.6 KB
FTN256_v1_Cu_XO_XP2
Rev. R1 6/9/2022 PDF 150.2 KB
FN484
Rev K1 6/8/2022 PDF 30.4 KB
LatticeXP2 Product Family Qualification Summary
E 11/1/2012 PDF 226.7 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
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Embedded Display Control Using FPGAs
1.0 3/1/2010 PDF 249.6 KB
Embedded Display Control Using FPGAs (Traditional Chinese Language)
5/22/2013 PDF 1.6 MB
FPGA Design Security Issues: Using Lattice FPGAs to Achieve High Design Security
9/1/2007 PDF 259.2 KB
Third Generation Non-Volatile FPGAs Enable System on Chip Functionality
6/1/2007 PDF 329.1 KB
Interfacing Analog to Digital Converters to FPGAs
1.0 11/7/2007 PDF 202.3 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
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[BSDL] LFXP2 5E_CSBGA132
1.01 12/1/2009 BSM 32.4 KB
[BSDL] LFXP2 8E TQFP144
1.01 12/1/2009 BSM 38.1 KB
[BSDL] LFXP217E 484 FPBGA
1.01 12/1/2009 BSM 70.1 KB
[BSDL] LFXP2 8E_CSBGA132
1.01 12/1/2009 BSM 36.9 KB
[BSDL] LFXP2 40E_FPBGA672
1.01 12/1/2009 BSM 100.5 KB
[BSDL] LFXP2 5E_FTBGA256
1.01 12/1/2009 BSM 40.7 KB
[BSDL] LFXP217E 256 FPBGA
1.01 12/1/2009 BSM 54.5 KB
[BSDL] LFXP2 30E_FPBGA484
1.01 12/1/2009 BSM 78.9 KB
[BSDL] LFXP2 5E_PQFP208
1.01 12/1/2009 BSM 38.3 KB
[BSDL] LFXP217E 208 PQFP
1.01 12/1/2009 BSM 50.5 KB
[BSDL] LFXP2 8E_FPBGA484
1.01 12/1/2009 BSM 55.5 KB
[BSDL] LFXP2 30E_FPBGA672
1.01 12/1/2009 BSM 90.6 KB
[BSDL] LFXP2 8E_FTBGA256
1.01 12/1/2009 BSM 46.9 KB
[BSDL] LFXP2 40E_FPBGA484
1.01 12/1/2009 BSM 84.7 KB
[BSDL] LFXP2 5E_TQFP144
1.01 12/1/2009 BSM 33.5 KB
[BSDL] LFXP2 8E_PQFP208
1.01 12/1/2009 BSM 42.9 KB
[BSDL] LFXP2 30E_FTBGA256
1.01 12/1/2009 BSM 62.9 KB
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XP2 Device Family DELPHI Models
1.0 4/9/2009 ZIP 297.9 KB
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[IBIS] LatticeXP2 IBIS Model
2.4 1/27/2009 IBS 34.1 MB
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TransFR Demo for LatticeXP2 Standard Evaluation Board
Demonstrates the TransFR feature of the LatticeXP2 FPGA. Update your FPGA with no down-time! 		8/10/2007 ZIP 394.5 KB

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