MACsec AES256-GCM, Balanced (XIP1213B)

XIP1213B – MACsec (IEEE 802.1AE) IP Core

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The balanced MACsec IP core from Xiphera implements the MACsec protocol as standardized in IEEE Std 802.1AE-2018. The MACsec protocol defines a security infrastructure for Layer 2 (as per the OSI model) traffic by assuring that a received frame has been sent by a transmitting station that claimed to send it. The IP core uses Advanced Encryption Standard with 256 bits long key in Galois Counter Mode (AES-GCM) to protect data confidentiality, data integrity, and data origin authentication.

Performance: The balanced MACsec IP core achieves a high throughput, for example 889.03+ Gbps in Lattice CertusPro-NX.

Standard Compliance: The IP core is fully compliant with the MACsec protocol as standardised in IEEE Std 802.1AE-2018. The cipher suite (GCM-AES-256 or GCM-AES-XPN-256) is fully compliant with the Advanced Encryption Algorithm (AES) standard, as well as with the Galois Counter Mode (GCM) standard.

Moderate Resource Requirements: The entire IP core requires 23967 4-input Lookup Tables (4LUTs) (Lattice CertusPro-NX), and does not require any multipliers or DSPBlocks in a typical Lattice® FPGA implementation.

Features

  • 32-bit FIFO Interfaces ease the integration of the IP core with other Lattice® FPGA logic and/or control software.

Block Diagram

Ordering Information

Please contact sales@xiphera.com for pricing and your preferred delivery method. The IP core can be shipped in a number of formats, including netlist, source code, or encrypted source code. Additionally, a comprehensive VHDL testbench and a detailed datasheet are included.

Download the full product brief:

https://xiphera.com/wp-content/uploads/XIP1213B_PB_lattice.pdf

Documentation

Information Resources
TITLE NUMBER VERSION DATE FORMAT SIZE
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Xiphera Lattice IP Core Metrics
1.0 8/5/2021 PDF 41.2 KB

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