The Helion Tiny Hash Core family for Lattice FPGA offers a combination of high functionality and low resource usage for lower data rate applications than the Helion Fast Hash Core family. The core is available in versions which support one or more of the five NIST approved cryptographic hashing algorithms described in FIPS 180-3; SHA-1, SHA-224, SHA-256, SHA-384 and SHA-512, plus the legacy MD5 algorithm described in RFC 1321.
It can optionally support the standard Keyed Hash-based Message Authentication Code (HMAC) algorithm described in FIPS 198-1 which is widely used for data authentication and integrity checking in a number of data security protocols. Support for full hash state unload and reload also greatly improves system throughput when hashing interleaved or packetised message streams. A simple synchronous host system interface ensures easy connection into any end user application whether employed as a hardware hashing accelerator for an embedded processor, or connected directly into the datapath.