Lattice Blog

In this 6 part series we are looking at the challenges of implementing an efficient power management architecture in today’s complex circuit board designs.

In our 5^th post, we will look at one final attempt to develop an efficient power management solution for a modern circuit board. In this model we have come full circle. The control PLD is back in charge of all power management functions.

Our previous post covered a hybrid architecture, where the control PLD was splitting the power management responsibilities with a dedicated power manager IC. This next option is used by some designs to replace the dedicated power manager IC with a software driven MCU.

In our last post, we looked at an architecture where the control PLD controlled all of the power management functionality and identified any weaknesses around congestion and crosstalk. Today, we will review a hybrid architecture that attempts to solve the congestion/crosstalk problems by ...

In this 6-part series, we are looking at the challenges of implementing an efficient power management architecture in today’s complex circuit board designs.

The consumer’s desire for new technology is insatiable. To meet this demand, engineers are constantly striving to make things smaller, faster, cheaper, and better. As sizes shrink and complexity increases, we often find that techniques that have served us well for a long time no longer meet our needs. We must evolve alongside our designs.