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  • Image Signal Processing IP Cores Suite

    IP Core

    Image Signal Processing IP Cores Suite

    The Lattice mVision ISP IP Core implements ISP pipelines for image quality enhancements in embedded designs based on Lattice FPGA devices.
    Image Signal Processing IP Cores Suite
  • PCI Express for Nexus FPGAs

    IP Core

    PCI Express for Nexus FPGAs

    The Lattice PCIe IP Core provides a flexible, high-performance, easy-to-use Transaction Layer Interface to the PCI Express Bus.
    PCI Express for Nexus FPGAs
  • RISC-V MC CPU IP Core

    IP Core

    RISC-V MC CPU IP Core

    The Lattice RISC-V MC CPU soft IP contains a 32-bit RISC-V processor core and optional submodules – Timer and Programmable Interrupt Controller (PIC).
    RISC-V MC CPU IP Core
  • RISC-V SM CPU IP Core

    IP Core

    RISC-V SM CPU IP Core

    Lattice RISC-V SM CPU IP core supports the RV32I instruction set, external interrupt, and debug feature, which is JTAG – IEEE 1149.1 compliant.
    RISC-V SM CPU IP Core
  • PCI Express for Avant FPGAs

    IP Core

    PCI Express for Avant FPGAs

    The Lattice PCIe X8 IP Core provides a flexible, high-performance, easy-to-use Transaction Layer Interface to the PCI Express Bus.
    PCI Express for Avant FPGAs
  • RISC-V RX CPU IP Core

    IP Core

    RISC-V RX CPU IP Core

    Lattice RISC-V RX IP processes data and instructions while monitoring the external interrupts, using 32-bit RISC-V processor core and several submodules.
    RISC-V RX CPU IP Core
  • Lattice Sentry I2C Filter IP Core

    IP Core

    Lattice Sentry I2C Filter IP Core

    Sentry I2C Filter IP Core provides an interface between I2C bus devices and a host processor while protecting against common I2C bus vulnerabilities.
    Lattice Sentry I2C Filter IP Core
  • Lattice Sentry QSPI Monitor IP Core for MachXO3D

    IP Core

    Lattice Sentry QSPI Monitor IP Core for MachXO3D

    Propel IP Module for Lattice Sentry: Monitors traffic on SPI/QSPI bus to identify and block potentially illegal traffic.
    Lattice Sentry QSPI Monitor IP Core for MachXO3D
  • Tightly-Coupled Memory (TCM) IP Core

    IP Core

    Tightly-Coupled Memory (TCM) IP Core

    The Tightly-Coupled Memory IP ensures low-latency automatic selection of the best memory type for user-selected application.
    Tightly-Coupled Memory (TCM) IP Core
  • Convolutional Neural Network (CNN) Accelerator IP

    IP Core

    Convolutional Neural Network (CNN) Accelerator IP

    Implement AI solutions with CNNs from common or custom networks. Configure up to 16-bit widths. Works with Lattice Neural Network Compiler software tool.
    Convolutional Neural Network (CNN) Accelerator IP
  • I3C Controller IP Core

    IP Core

    I3C Controller IP Core

    I3C Controller IP Core is a two-wire, bi-directional serial bus designed for use with many sensor secondary devices controlled by a single I3C controller.
    I3C Controller IP Core
  • I3C Target IP Core

    IP Core

    I3C Target IP Core

    I3C Target IP Core enables greater than 10-fold speed improvements, more effective bus power management, and backward compatibility with I2C devices.
    I3C Target IP Core
  • Tri-Speed Ethernet MAC IP Core

    IP Core

    Tri-Speed Ethernet MAC IP Core

    The TSEMAC IP core have the logic, interfacing & clocking infra to ably integrate an external industry-standard Ethernet PHY with an internal processor
    Tri-Speed Ethernet MAC IP Core
  • UART IP Core

    IP Core

    UART IP Core

    Propel IP Module: Similar to NS16450 UART for serial communication supporting RS-232.
    UART IP Core
  • SPI Controller IP Core

    IP Core

    SPI Controller IP Core

    Lattice SPI Controller IP Core is used to communicate with external SPI Target devices such as display drivers, SPI EPROMS, and analog-to-digital converters.
    SPI Controller IP Core
  • PCI Express Endpoint Core

    IP Core

    PCI Express Endpoint Core

    Provides a PCI Express x1, x2 or x4 endpoint solution from the electrical SERDES interface to the transaction layer
    PCI Express Endpoint Core
  • LatticeMico32 Open, Free 32-Bit Soft Processor

    IP Core

    LatticeMico32 Open, Free 32-Bit Soft Processor

    A 32-bit Harvard, RISC architecture soft microprocessor, available for free with an open IP core license. Many compatible modules and IP are available.
    LatticeMico32 Open, Free 32-Bit Soft Processor
  • 10Gb Ethernet MAC IP Core

    IP Core

    10Gb Ethernet MAC IP Core

    Transmits and receives data between a host processor and an Ethernet network, compliant to IEEE 802.3-2005 standard
    10Gb Ethernet MAC IP Core
  • Scatter-Gather DMA Controller IP Core

    IP Core

    Scatter-Gather DMA Controller IP Core

    Implements a configurable, multi-channel, WISHBONE-compliant DMA controller with scatter-gather capability
    Scatter-Gather DMA Controller IP Core
  • XAUI 10Gb Ethernet Attachment Unit Interface IP Core

    IP Core

    XAUI 10Gb Ethernet Attachment Unit Interface IP Core

    10Gb Ethernet Attachment Unit Interface or XAUI includes support for the XAUI which is used to interface with physical layer devices in 10GbE networks.
    XAUI 10Gb Ethernet Attachment Unit Interface IP Core
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