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  • DisplayPort & Video Scaler Reference Design

    Reference Design

    DisplayPort & Video Scaler Reference Design

    The Lattice Drive DisplayPort & Video Scaler Reference Design implements easy evaluation of various DisplayPort interface.
    DisplayPort & Video Scaler Reference Design
  • Object Counting AI

    Reference Design

    Object Counting AI

    An example object counting application based on the Lattice sensAI stack. Includes SPI, DDR IP blocks, ISP engine, 8 CNN engines and a counting / overlay engine
    Object Counting AI
  • CertusPro-NX N Input to 1 Output MIPI CSI-2 Side-by-Side Aggregation

    Reference Design

    CertusPro-NX N Input to 1 Output MIPI CSI-2 Side-by-Side Aggregation

    Modular MIPI/D-PHY Reference Design - Multiple channel image data concatenated horizontally line by line and offers up to eight-channel aggregation.
    CertusPro-NX N Input to 1 Output MIPI CSI-2 Side-by-Side Aggregation
  • MIPI DSI/CSI-2 to OpenLDI LVDS Interface Bridge for CertusPro-NX

    Reference Design

    MIPI DSI/CSI-2 to OpenLDI LVDS Interface Bridge for CertusPro-NX

    Modular MIPI/D-PHY Reference Design - MIPI DSI/CSI-2 to OpenLDI LVDS Interface Bridge reference design takes DSI or CSI-2 MIPI data and converts them to OpenLDI format on LVDS.
    MIPI DSI/CSI-2 to OpenLDI LVDS Interface Bridge for CertusPro-NX
  • SLVS-EC to MIPI CSI-2 with CertusPro-NX

    Reference Design

    SLVS-EC to MIPI CSI-2 with CertusPro-NX

    Modular MIPI/D-PHY Reference Design - Support advance camera and display interconnections in mobile devices that enable higher performance sensor with optimized power.
    SLVS-EC to MIPI CSI-2 with CertusPro-NX
  • SubLVDS to MIPI CSI-2 Image Sensor Bridge with CertusPro-NX

    Reference Design

    SubLVDS to MIPI CSI-2 Image Sensor Bridge with CertusPro-NX

    Modular MIPI/D-PHY Reference Design - Solves the mismatch between SubLVDS output image sensor and an ISP/AP using CSI-2 interface.
    SubLVDS to MIPI CSI-2 Image Sensor Bridge with CertusPro-NX
  • MIPI DSI/CSI-2 to OpenLDI LVDS Interface Bridge

    Reference Design

    MIPI DSI/CSI-2 to OpenLDI LVDS Interface Bridge

    Modular MIPI/D-PHY Reference Design - Complete solution integrates the Byte to Pixel Converter, CSI-2/DSI D-PHY Receiver and FPD-LINK (OpenLDI) Transmitter
    MIPI DSI/CSI-2 to OpenLDI LVDS Interface Bridge
  • MIPI DSI/CSI-2 to Parallel Bridge Reference Design

    Reference Design

    MIPI DSI/CSI-2 to Parallel Bridge Reference Design

    MIPI to Parallel allows quick interface between a processor and a display using RGB; or between a camera and a processor with a Parallel interface.
    MIPI DSI/CSI-2 to Parallel Bridge Reference Design
  • Parallel to MIPI CSI-2 / DSI Display Interface Bridge Reference Design

    Reference Design

    Parallel to MIPI CSI-2 / DSI Display Interface Bridge Reference Design

    Lattice Parallel to MIPI CSI-2/DSI Display Interface Bridge Reference Design supports low-power (LP) mode during vertical and horizontal blanking.
    Parallel to MIPI CSI-2 / DSI Display Interface Bridge Reference Design
  • SubLVDS to MIPI CSI-2 Image Sensor Bridge

    Reference Design

    SubLVDS to MIPI CSI-2 Image Sensor Bridge

    Modular MIPI/D-PHY Reference Design - Complete solution integrates the Pixel to Byte Converter, SubLVDS Image Sensor Recevier and CSI-2/DSI D-PHY Transmitter
    SubLVDS to MIPI CSI-2 Image Sensor Bridge
  • Multi-Channel Motor Control with Predictive Maintenance Reference Design

    Reference Design

    Multi-Channel Motor Control with Predictive Maintenance Reference Design

    This design incorporates a RISC-V CPU and processing subsystem supporting multi-channel Motor Control with Predictive Maintenance.
    Multi-Channel Motor Control with Predictive Maintenance Reference Design
  • MIPI CSI-2 Receive Bridge

    Reference Design

    MIPI CSI-2 Receive Bridge

    Enables a mobile CSI-2 (Camera Serial Interface) image sensor to interface to an embedded Image Signal Processor. Up to 4 lanes at 900 Mbps per lane
    MIPI CSI-2 Receive Bridge
  • MIPI CSI-2 Transmit Bridge

    Reference Design

    MIPI CSI-2 Transmit Bridge

    Enables bridging of image inputs like subLVDS or HiSPI to MIPI CSI-2. Up to 4 lanes at 900 Mbps per lane
    MIPI CSI-2 Transmit Bridge
  • MIPI DSI Receive Bridge

    Reference Design

    MIPI DSI Receive Bridge

    Allows an AP (Application Processor) or other DSI source to interface to a non-DSI (such as LVDS) display. Up to 4 data lanes at 900 Mbps per lane
    MIPI DSI Receive Bridge
  • Sensor Extender

    Reference Design

    Sensor Extender

    Transmits 720p60 or 1080p30 video over 8 meters of CAT5e/6 cable using two MachXO2 FPGAs, one next to the image sensor and the other just before the ISP.
    Sensor Extender
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