Lattice Solutions

Everything you need to quickly and easily complete your design

Share This Result >

Narrow Your Results



Solution Type



Device Support









Tags




















Providers
Clear All
  • DDR3 SDRAM Controller

    IP Core

    DDR3 SDRAM Controller

    General-purpose complete memory controller interfaces with industry standard DDR3 memory (JESD79-3 Standard), and provides a generic command interface
    DDR3 SDRAM Controller
  • LPDDR3 SDRAM Controller

    IP Core

    LPDDR3 SDRAM Controller

    A general-purpose memory controller that interfaces with industry standard LPDDR3 memory devices and modules compliant with the JESD-209.3 specification
    LPDDR3 SDRAM Controller
  • PCI Express Endpoint Core

    IP Core

    PCI Express Endpoint Core

    Provides a PCI Express x1, x2 or x4 endpoint solution from the electrical SERDES interface to the transaction layer
    PCI Express Endpoint Core
  • PCI Express x1, x4 Root Complex Lite IP Core

    IP Core

    PCI Express x1, x4 Root Complex Lite IP Core

    Provides a PCI Express x1 and x4 root complex solution from the electrical SERDES interface, physical layer, data link layer and a minimum transaction layer in PCIe protocol stack
    PCI Express x1, x4 Root Complex Lite IP Core
  • Scatter-Gather DMA Controller

    IP Core

    Scatter-Gather DMA Controller

    Implements a configurable, multi-channel, WISHBONE-compliant DMA controller with scatter-gather capability
    Scatter-Gather DMA Controller
  • LPDDR SDRAM Controller

    IP Core

    LPDDR SDRAM Controller

    General-purpose memory controller that interfaces with industry standard LPDDR memory devices/modules compliant with JESD209B
    LPDDR SDRAM Controller
  • 32 Bit PCI Master/Target

    IP Core

    32 Bit PCI Master/Target

    Provides a customizable 32/64-bit master/target or target solution - revision 2.2 for speeds up to 66MHz
    32 Bit PCI Master/Target
  • 32 Bit PCI Target

    IP Core

    32 Bit PCI Target

    Fully compliant with the PCI Local Bus Specification, revision 2.2 for speeds up to 66MHz
    32 Bit PCI Target
  • 64 Bit PCI Master/Target

    IP Core

    64 Bit PCI Master/Target

    Fully compliant with the PCI SIG 3.0 for speeds up to 66MHz. Customizable for 32/64-bit master/target or target solution
    64 Bit PCI Master/Target
  • 64 Bit PCI Target

    IP Core

    64 Bit PCI Target

    Fully compliant with the PCI SIG 3.0 for speeds up to 66MHz. Customizable for 32/64-bit.
    64 Bit PCI Target
  • PHY Interface for PCI Express - PIPE

    IP Core

    PHY Interface for PCI Express - PIPE

    A standard interface between a PHY device and the Media Access (MAC) layer for PCI Express (PCIe) applications
    PHY Interface for PCI Express - PIPE
  • DDR SDRAM Controller - Pipelined

    IP Core

    DDR SDRAM Controller - Pipelined

    General-purpose memory controller that interfaces with industry standard DDR SDRAM
    DDR SDRAM Controller - Pipelined
  • DDR2 SDRAM Controller - Pipelined

    IP Core

    DDR2 SDRAM Controller - Pipelined

    General-purpose memory controller that interfaces with industry standard DDR2 SDRAM
    DDR2 SDRAM Controller - Pipelined
  • Page 1 of 1
    First Previous
    1
    Next Last