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  • High-Speed PCB Design Considerations (Chinese Language Version)

    Document

    High-Speed PCB Design Considerations (Chinese Language Version)

    高速印刷电路板的设计考虑 2011 年 4 月 技术说明 TN1033 www.latticesemi.com 1 tn1033_06.1-C Lattice Semiconductor Corp.2011版权所有 © 所有莱迪思的商标、注册商标、图案和标识符均在 www.latticesemi.com/legal 网站上列出。所有其它品牌或产品名称均 为其所有者的商标或注册商标。此处的参数规格和信息可能会更改,恕不另行通知。中文翻译文档仅为您提供方便。莱迪思将尽力为您提供准确的中文翻译文档,但…
  • LatticeSC High-Speed Backplane Measurements

    Document

    LatticeSC High-Speed Backplane Measurements

    www.latticesemi.com 1 tn1118_01 LatticeSC™ High-Speed Backplane Measurements June 2006 Technical Note TN1118 Introduction The LatticeSC device contains multiple SerDes blocks arranged as quads. Each SerDes (SERializer/DESerializer) provides a serial high speed backplane transceiver…
  • CrossLinkPlus Hardware Checklist

    Document

    CrossLinkPlus Hardware Checklist

    CrossLinkPlus Hardware Checklist Technical Note FPGA-TN-02105-1.0 August 2019 CrossLinkPlus Hardware Checklist Technical Note FPGA-TN-02105-1.0 August 2019 CrossLinkPlus Hardware Checklist Technical Note © 2019 Lattice Semiconductor Corp. All Lattice trademarks,…
  • ORTx2G5, ORSOx2G5 and ORSPI4 High-Speed Backplane Measurements

    Document

    ORTx2G5, ORSOx2G5 and ORSPI4 High-Speed Backplane Measurements

    www.latticesemi.com 1 tn1027_03 ORTx2G5, ORSOx2G5 and ORSPI4 High-Speed Backplane Measurements July 2004 Technical Note TN1027 Introduction The Lattice ORT82G5 and ORSO82G5 FPSC devices contain two Quad-SERDES blocks. The Lattice ORT42G5, ORSO42G5 and ORSPI4 FPSC devices contain one…
  • Electrical Recommendations for Lattice SERDES (Chinese Language Version)

    Document

    Electrical Recommendations for Lattice SERDES (Chinese Language Version)

    www.latticesemi.com 1 tn1114_02.8-C 2012 年 9 月 技术说明 TN1114 Lattice Semiconductor Corp.2006版权所有 © 所有莱迪思的商标、注册商标、图案和标识符均在 www.latticesemi.com/legal网站上列出。所有其它品牌或产品名称均 为其所有者的商标或注册商标。此处的参数规格和信息可能会更改,恕不另行通知。中文翻译文档仅为您提供方便。莱迪思将尽力为您提供准确的中文翻译文档,但…
  • LatticeECP3 Hardware Checklist

    Document

    LatticeECP3 Hardware Checklist

    February 2012 Technical Note TN1189 www.latticesemi.com 18-1 tn1189_02.1 © 2012 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are trademarks or registered trademarks…
  • LatticeECP3 and LatticeECP2M High-Speed Backplane Measurements

    Document

    LatticeECP3 and LatticeECP2M High-Speed Backplane Measurements

    www.latticesemi.com 19-1 tn1149_01.5 June 2013 Technical Note TN1149 © 2013 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are trademarks or registered trademarks of…
  • ispGDX2

    Webpage

    ispGDX2

    This is a mature and discontinued device. View documentation and downloads available for this product.
  • CrossLink Hardware Checklist

    Document

    CrossLink Hardware Checklist

    CrossLink Hardware Checklist Technical Note FPGA-TN-02013-1.3 December 2020 CrossLink Hardware Checklist Technical Note FPGA-TN-02013-1.3 December 2020 CrossLink Hardware Checklist Technical Note © 2016-2020 Lattice Semiconductor Corp. All Lattice trademarks, registered…
  • ispXPGA

    Webpage

    ispXPGA

    This is a mature and discontinued device. View documentation and downloads available for this product.
  • Should I add external series resistors to my parallel bus to improve the signal integrity?

    FAQ

    Should I add external series resistors to my parallel bus to improve the signal integrity?

    Situation: A device is driving a large number of IOs that switch between VCCIO and GND in a parallel data bus. The designer knows that with an unterminated bus there can be reflections if the signal traces are too long which could decrease the margins, resulting in data errors. The designer is…
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