Lattice Propel Design Environment

Build FPGA-based Processor Systems in Minutes

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Design Environment for Lattice FPGA-based Processor System Design - Lattice Propel is a complete set of graphical and command-line tools to create, analyze, compile, and debug both the hardware design of an FPGA-based processor system, and the software design for that processor system.

Lattice Propel Builder - An easy to use system IP integration environment, Propel Builder provides tools to integrate processors and peripheral IP. The graphical integration environment features an easy-to-use, drag and drop correct-by-construction methodology. All commands are Tcl scriptable.

Lattice Propel SDK - A seamless software development environment, Propel SDK is a software development kit (SDK) with an integrated industry standard IDE and toolchain. The SDK features SW/HW debugging capabilities along with software libraries and board support packages (BSP) for Propel Builder defined systems.

Features

  • Drag and drop IP instantiation
  • Correct by construction design methodology
  • High productivity HW/SW debugging
  • Software libraries and BSP support
  • Tcl scripting commands

Getting Started

  1. Download: Choose and download software from the Software Downloads & Documentation table below
  2. Install: Follow the installation guide, found in Software Downloads & Documentation section below.
  3. License: You will need a Lattice Propel license, Click the button below to request a license.

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Block Diagrams

Lattice Propel Design Environment

Lattice Propel Design Environment

Lattice Propel Builder Design Flow

Lattice Propel Design Flow

Lattice Propel Solutions

RISC-V MC CPU IP Core

IP Core

RISC-V MC CPU IP Core

The Lattice RISC-V MC CPU soft IP contains a 32-bit RISC-V processor core and optional submodules – Timer and Programmable Interrupt Controller (PIC).
MachXO3D, Certus-NX, CrossLink-NX, Avant-E, MachXO5-NX, CertusPro-NX, MachXO3, MachXO2, Avant-G, Avant-X, ECP5 / ECP5-5G 
AHB-Lite, Soft Processor, RISC-V, Lattice Propel, TOR Switch, Defense, Automotive, SDR 
RISC-V MC CPU IP Core
RISC-V SM CPU IP Core

IP Core

RISC-V SM CPU IP Core

Lattice RISC-V SM CPU IP core supports the RV32I instruction set, external interrupt, and debug feature, which is JTAG – IEEE 1149.1 compliant.
Avant-E, MachXO5-NX, Certus-NX, CertusPro-NX, CrossLink-NX, MachXO3D, MachXO3, MachXO2, Avant-G, Avant-X, ECP5 / ECP5-5G 
AHB-Lite, Soft Processor, RISC-V, Lattice Propel, TOR Switch, Defense, Automotive, SDR 
RISC-V SM CPU IP Core
RISC-V RX CPU IP Core

IP Core

RISC-V RX CPU IP Core

Lattice RISC-V RX IP processes data and instructions while monitoring the external interrupts, using 32-bit RISC-V processor core and several submodules.
Avant-E, MachXO5-NX, Certus-NX, CertusPro-NX, CrossLink-NX, Avant-G, Avant-X, ECP5 / ECP5-5G 
AHB-Lite, Soft Processor, RISC-V, RTOS, Lattice Propel, Defense, Automotive 
RISC-V RX CPU IP Core
Lattice Sentry PLD Interface IP Core

IP Core

Lattice Sentry PLD Interface IP Core

Lattice Semiconductor Customer Programmable Logic Devices (PLD)implements a bidirectional mailbox for sending and receiving messages.
Mach-NX, MachXO5-NX 
AHB-Lite, APB, FPGA, RTL, Lattice Propel, PLD, Lattice Sentry, Lattice Sentry PFR IP Package, Security 
Lattice Sentry PLD Interface IP Core
Lattice Sentry SMBus Mailbox IP Core

IP Core

Lattice Sentry SMBus Mailbox IP Core

SMBus, a two-wire interface that support fairness arbitration and compatible with AHB-Lite specification. Target devices are Mach-NX and MachXO3D.
MachXO3D, Mach-NX 
I2C, AHB-L, Lattice Propel, Lattice Sentry, Security, SMBus, RoT, RTL, Lattice Sentry PFR IP Package 
Lattice Sentry SMBus Mailbox IP Core
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Award

Lattice Semiconductor Wins Two Medals at 2020 LEAP Awards Expand Image

Leadership in Engineering Achievement Program (LEAP) Awards 2020

Gold Medal- Software Category

Software Downloads & Documentation

Quick Reference
Information Resources
Downloads
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
Lattice Propel 2024.1 Installation for Linux User Guide
FPGA-AN-02089 1.0 6/28/2024 PDF 377.7 KB
Lattice Propel 2024.1 Installation for Windows User Guide
FPGA-AN-02088 1.0 6/28/2024 PDF 828.9 KB
ModelSim Lattice-Edition Usage Guidelines and Tips
FPGA-AN-02053 1.0 10/31/2022 PDF 1.9 MB
Revision Control – Lattice Propel Builder 2024.1 User Guide
FPGA-UG-02214 1.0 6/28/2024 PDF 1.7 MB
Lattice IP Packager 2024.1 User Guide
FPGA-UG-02213 1.0 6/28/2024 PDF 3 MB
Lattice Propel 2024.1 Builder User Guide
FPGA-UG-02212 1.0 6/28/2024 PDF 5.9 MB
Lattice Propel 2024.1 SDK User Guide
FPGA-UG-02211 1.0 6/28/2024 PDF 4.3 MB
Lattice Propel Revision Control User Guide
FPGA-UG-02198 1.1 2/1/2024 PDF 1.6 MB
Lattice Propel 2023.2 Release Notes
FPGA-AN-02068 1.0 12/5/2023 PDF 261.1 KB
Lattice Propel 2024.1 Release Notes
FPGA-AN-02090 1.0 6/28/2024 PDF 279.6 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
Lattice RISC-V Embedded Design Guidelines
FPGA-AN-02072 1.0 2/25/2024 PDF 1.9 MB
ModelSim Lattice-Edition Usage Guidelines and Tips
FPGA-AN-02053 1.0 10/31/2022 PDF 1.9 MB
Lattice Propel 1.0 API Reference
FPGA-AN-02027 1.0 6/3/2020 PDF 914.5 KB
Scripting Lattice FPGA Build Flow
FPGA-AN-02073 1.0 10/31/2023 PDF 1.2 MB
Composable Custom Extensions on Lattice RISC-V RX User Guide
FPGA-AN-02075 1.1 3/15/2024 PDF 1.1 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
Lattice Propel 2024.1 Installation for Linux User Guide
FPGA-AN-02089 1.0 6/28/2024 PDF 377.7 KB
Lattice Propel 2024.1 Installation for Windows User Guide
FPGA-AN-02088 1.0 6/28/2024 PDF 828.9 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
Revision Control – Lattice Propel Builder 2024.1 User Guide
FPGA-UG-02214 1.0 6/28/2024 PDF 1.7 MB
AXI Registers for Custom IP Framework - Lattice Propel Builder
FPGA-IPUG-02221 1.0 3/9/2023 PDF 391 KB
AXI4 to APB Bridge Module User Guide
FPGA-IPUG-02198 1.3 6/28/2024 PDF 338.5 KB
AXI4 to AHB-Lite Bridge Module User Guide
FPGA-IPUG-02199 1.3 6/28/2024 PDF 339.7 KB
Clock Reset Generator VIP - Lattice Propel Builder
FPGA-IPUG-02147 1.0 12/8/2020 PDF 1.1 MB
UART Model VIP - Lattice Propel Builder
FPGA-IPUG-02146 1.1 12/8/2020 PDF 1.1 MB
Lattice IP Packager 2024.1 User Guide
FPGA-UG-02213 1.0 6/28/2024 PDF 3 MB
Lattice Propel 2024.1 Builder User Guide
FPGA-UG-02212 1.0 6/28/2024 PDF 5.9 MB
Lattice Propel 2024.1 SDK User Guide
FPGA-UG-02211 1.0 6/28/2024 PDF 4.3 MB
Lattice Propel Revision Control User Guide
FPGA-UG-02198 1.1 2/1/2024 PDF 1.6 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
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Lattice Propel Product Brochure
IO272 2.0 9/29/2022 PDF 1.8 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
Lattice Propel 2023.2 Release Notes
FPGA-AN-02068 1.0 12/5/2023 PDF 261.1 KB
Lattice Propel 2024.1 Release Notes
FPGA-AN-02090 1.0 6/28/2024 PDF 279.6 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
A Step-By-Step Approach to Lattice Propel
FPGA-AN-02052 1.1 2/19/2024 PDF 1.9 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
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Lattice Propel Helps Designers Create Processor-Based Systems in Minutes
WP0029 1.0 2/23/2021 PDF 503.9 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
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Lattice Propel 2023.2 64-bit for Linux
2023.2 12/5/2023 ZIP 1.6 GB
Lattice Propel 2023.2 64-bit for Windows
2023.2 12/5/2023 ZIP 1.4 GB
Lattice Propel 2024.1 64-bit for Windows
2024.1 6/28/2024 ZIP 1.4 GB
Lattice Propel 2024.1 64-bit for Linux
2024.1 6/28/2024 ZIP 2.1 GB
MPESTI Initiator Reference Design Propel 2022.1 Patch
9/14/2023 EXE 31.2 MB
Sentry RISC-V Solution for Propel (Propel 1.0 Patch for Lattice Sentry)
1.0 8/12/2020 EXE 24.4 MB

*By clicking on the "Notify Me of Changes" button, you agree to receive notifications on changes to the document(s) you selected.

Licensing

Currently, Lattice Propel Design Environment only requires a Free License.

Notice: If you are upgrading to Propel 2022.1 or later and generated your free Propel license prior to December 2022, please generate a new license to enable proper usage of all tools included in Propel.

Device Support

Device Support by License
Product Subscription License Free License
Avant-E
Check Mark
Avant-G
Check Mark
Avant-X
Check Mark
CertusPro-NX
Check Mark
Certus-NX
Check Mark
CrossLink-NX
Check Mark
Mach-NX
Check Mark
MachXO5-NX
Check Mark
MachXO3D
Check Mark
MachXO3LF
Check Mark
MachXO3L
Check Mark
MachXO2
Check Mark
ECP5U
Check Mark
ECP5UM
Check Mark
ECP5UM5G
Check Mark
Operating System
Windows
Windows 10
Windows 11
Linux
RHEL 7.9
RHEL 8.8
Ubuntu 20.04 LTS
Ubuntu 22.04 LTS
 
Request License

Propel Feature List

  • Propel Builder – Graphical driven IP integration and system building tool drag and drop instantiation and wizard guided configuration and parameterization.
  • Propel SDK – Software development kit with Industry-standard IDE and toolchain with integrated Gnu Debugging (GDB).
  • Templates for Hello World project
  • System-level functional verification environment for templates

Version History

Click here to see all Propel Version History.

Videos

Lattice Propel Thumbnail
Expand Video

Get Started Quickly with Lattice Propel

Lattice Propel is the Embedded Design Environment to implement RISC-V soft processor systems in Lattice FPGAs. This demonstration will guide you through building an embedded design, developing the software for the processor, implementation in the FPGA, and debugging the system all with in the Propel environment.
Propel Demo Thumbnail
Expand Video

Propel Simplifies Mach-NX Design

Use Lattice Propel software to add advanced security to a system control FPGA design quickly
Lattice Propel Training Series

Lattice Propel Design Environment Video Training Series

The Lattice Propel Design Environment Video Training Series is a multi-part video series covering every aspect of Propel development suite which includes Propel Builder and Propel SDK. It is well suited for both experienced and new users wanting to learn to develop SoC project using Propel and how to integrate the projects with Radiant and Diamond tools.

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