The Lattice Finite Impulse Response (FIR) Filter IP Core is implemented using high performance Digital Signal Processing (DSP) blocks available in Lattice devices. The input data, coefficient, and output data widths are configurable over a wide range. The IP core uses full internal precision while allowing variable output precision with several choices for saturation and rounding. The coefficients of the filter can be specified at generation time and/or reloadable during run-time through input ports.
Resource Utilization details are available in the IP Core User Guide.
Features
- Variable number of taps up to 1024
- Input data and coefficient widths of 4 to 16 bits
- Multi-channel support for up to 64 channels
- Signed or unsigned input data and coefficients
- Coefficients symmetry and negative symmetry optimization
