// the following will instantiate 4 SPI-3 interfaces
`define NUMINT4 1 
`define NUMINT3 1 
`define NUMINT2 1 
`define NUMINT1 1 

// 1,2,4,8: number of FCFIFOs per SPI3 interface
// the following will instantiate 4 FCFIFOs per SPI-3 interface
// `define NUMFIFO8 1  
`define NUMFIFO4 1 
`define NUMFIFO2 1 
`define NUMFIFO1 1 

`define NUMPORTS4

// select direct transmit packet available status indication
`define SELECT_DTPA 1

// 1,2,3,4 : number of SPI3 interfaces per FPGA
`define NUM_INT 4  

// 1,2,4,8 : number of FCFIFOs per SPI3 interface
`define NUM_FIFO 4  

// 5,6,7,8 : width of read/write counters in bits
`define WIDTH 6  

// 3,2,1   : number of bits used for fifo select
`define FIFO_SELB 2  

// 256,128,64,32 : burst length in bytes
`define BURST_LEN 256 

// 0,2     : min inter-burst pause = 0 or 2
`define RCV_PAUSE 2  

// 1-48    : number of ports per interface
`define PORTS 4

// 6,5,4,3,2,1 : number of bits used for port select
`define PORT_SELB 2
