LatticeECP3

高效,适用于创新,采用小尺寸的紧凑型封装

非常高效的性能——在尽可能小的空间内实现所有功能是至关重要的,拥有150K LUT的LatticeECP3可满足您的需求

最大的可靠性,最低的成本和功耗——LatticeECP3 FPGA带有片上SERDES以及低至0.5W的功耗,助您提高工业、远程通信或车用设备的可靠性并且降低成本

易于互连的FPGA——使用合适协议的SERDES,合适接口的I/O,使用LatticeECP3满足您的系统连接和扩展需求

特性

  • 多达16个通道,速率为3.125 Gbps
  • 800 Mbps DDR3,1Gbps LVDS
  • 多达586个可编程sysIO缓冲器,支持PCI Express、以太网(GbE、XAUI & SGMII)、HDMI、SMPTE、串行Rapid I/O、CPRI和JESD204A/B等等
  • 高达150K LUT以及6.8 Mbit的SRAM
  • 多种封装选择,尺寸小至10.0 mm x 10.0 mm,功耗低至0.5 W以下

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产品系列表

LatticeECP3 器件选型指南

参数 ECP3-17 ECP3-35 ECP3-70 ECP3-95 ECP3-150
LUT (K) 17 33 67 92 149
EBR SRAM 块 38 72 240 240 372
EBR SRAM (Kbit) 700 1327 4420 4420 6850
分布式RAM (Kbit) 36 68 145 188 303
18 x 18 乘法器 24 64 128 128 320
3.2 Gbps SERDES 通道 4 4 12 12 16
PLL + DLL 2+2 4+2 10+2 10+2 10+2
DDR 支持 DDR3 800, DDR2 533, DDR 400
引导闪存 外部 外部 外部 外部 外部
双引导
位流加密
内核电压 1.2 V 1.2 V 1.2 V 1.2 V 1.2 V
Temp C
Temp I
Temp AEC-Q100 - - -
0.5 mm 引脚间距 I/O 数量 / SERDES
  ECP3-17 ECP3-35 ECP3-70 ECP3-95 ECP3-150
328-ball csBGA (10 x 10 mm) 116 / 2
1.0 mm 引脚间距 I/O 数量 / SERDES
  ECP3-17 ECP3-35 ECP3-70 ECP3-95 ECP3-150
256-ball ftBGA (17 x 17 mm) 133 / 4 133 / 4
484-ball fpBGA (23 x 23 mm) 222 / 4 295 / 4 295 / 4 295 / 4
672-ball fpBGA (27 x 27 mm) 310 / 4 380 / 8 380 / 8 380 / 8
1156-ball fpBGA (35 x 35 mm) 490 / 12 490 / 12 586 / 16

莱迪思车用(AEC-Q100认证) LatticeECP3 器件选型指南

参数 LA-ECP3-17 LA-ECP3-35
LUT (K) 17 33
EBR SRAM (Kbit) 700 1327
EBR SRAM 块 38 72
分布式RAM (Kbit) 36 68
18 x 18 乘法器 24 64
3.2 Gbps SERDES 通道 4 4
最多可用 I/O 222 310
PLL + DLL 2+2 4+2
0.5 mm 引脚间距 I/O 数量 / SERDES
  LA-ECP3-17 LA-ECP3-35
328-ball csBGA (10 x 10 mm) 116 / 2
1.0 mm 引脚间距 I/O 数量 / SERDES
  LA-ECP3-17 LA-ECP3-35
256-ball ftBGA (17 x 17 mm) 133 / 4 133 / 4
484-ball fpBGA (23 x 23 mm) 222 / 4 295 / 4
672-ball fpBGA (27 x 27 mm) 310 / 4

解决方案实例

LatticeECP3拥有大量现成的设计关键组成模块,可以直接在您的设计中使用,LatticeECP3不仅仅是全功能的——它已经全副武装。为了帮助您尽可能高效地进行设计,莱迪思一直专注于开发适用于各种应用领域的解决方案,例如:

解决网络边缘的连接问题

  • 构建低成本的以太网与定制或传统接口之间的桥接
  • 快速实现ASSP与无线基站中常见协议之间的桥接,包括CPRI和JESD204
  • 实现网络流量的预处理,通过减少处理器的工作量来提高性能
  • 通过分担DSP功能来增强pico和femto-cell中ASSP的性能

实现高性能的控制面板解决方案,适用于通信、工业、医疗和其他应用

  • 使用串行接口提供与系统其他模块之间的高性能接口
  • 通过优化的预处理算法,减轻控制处理器的工作量

通过超快、大批量并行的工程实现,增强图片/视频系统性能

  • 使用业界领先的功能,提高图像质量
  • 通过成熟的视频分析功能快速解决现实世界的问题
  • 提供与常用的视频协议之间的接口

构建创新的汽车解决方案

  • 实现低成本的串行接口,在整个汽车内部传输图像数据
  • 使用硬件实现,高效地分析图像数据
  • 通过分担显示的缩放、旋转和组合功能,减少处理器的工作量

设计资源

IP和参考设计

使用经过预先测试、可重复使用的功能简化您的设计工作

应用说明

了解如何最高效地使用我们一系列的FPGA和开发板

软件

覆盖整个设计流程,非常易于使用

开发套件和开发板

我们的开发板和开发套件能够简化您的设计流程

编程硬件

使用我们的编程硬件,轻松完成在系统编程和在线重配置

文档

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快速参考
技术资源
资讯资源
下载
标题 编号 版本 日期 格式 文件大小
LA-LatticeECP3 Automotive Family Data Sheet
FPGA-DS-02052 1.2 3/31/2019
LatticeECP3 EA Family Data Sheet
Note: EA devices only.
DS1021 2.8EA 3/24/2015
High-Speed PCB Design Considerations
TN1033 06.1 5/2/2011
Electrical Recommendations for Lattice SERDES
FPGA-TN-02077 3.0 3/30/2018
LatticeECP3 Hardware Checklist
TN1189 2.1 2/13/2012
LatticeECP3 High-Speed I/O Interface
TN1180 2.3 4/2/2013
LatticeECP3 sysCONFIG Usage Guide
TN1169 3.1 6/1/2015
LatticeECP3 and LatticeECP2M High-Speed Backplane Measurements
TN1149 1.5 10/7/2013
LatticeECP3 sysCLOCK PLL/DLL Design and Usage Guide
TN1178 2.6 2/3/2014
LatticeECP3 sysIO Usage Guide
TN1177 2.2 8/19/2013
LatticeECP3 Power Consumption and Management
TN1181 1.1 2/2/2012
LatticeECP3 Marvell SGMII Physical/MAC Layer Interoperability
TN1197 1.1 2/13/2012
LatticeECP3 Marvell XAUI 10 Gbps Physical Layer Interoperability
TN1194 1.1 2/13/2012
LatticeECP3 Slave SPI Port User Guide
FPGA-TN-02136 1.8 8/26/2019
LatticeECP3 SERDES/PCS Usage Guide
TN1176 2.8 8/26/2014
LatticeECP3 sysDSP Usage Guide
TN1182 1.3 2/13/2012
LatticeECP3 and Broadcom 1 GbE (1000BASE-X) Physical/MAC Layer Interoperability
TN1217 1.0 7/26/2010
LatticeECP3 and Marvell 10 Gbps Physical/MAC Layer Interoperability
TN1219 1.0 7/26/2010
LatticeECP3 SERDES/PCS Reset Sequence - Source Code
For use with Technical Note - TN1176
TN1176 1.1 2/4/2010
LatticeECP3 Marvell 1 GbE (1000BASE-X) Physical/MAC Layer Interoperability
TN1196 1.1 2/13/2012
LatticeECP3 Memory Usage Guide
TN1179 1.8 4/1/2014
LatticeECP3 and Broadcom 10 Gbps Physical/MAC Layer Interoperability
TN1218 1.1 2/13/2012
Low-Cost Serial RapidIO to TI 6482 Digital Signal Processor Interoperability with LatticeECP3
TN1214 1.1 10/18/2010
Minimizing System Interruption During Configuration Using TransFR Technology
TN1087 3.7 10/30/2015
Parallel Flash Programming and FPGA Configuration
Also download the implementation files for AN8077.
AN8077 1.3 3/1/2015
Soft Error Detection SED Usage Guide
TN1184 1.7 11/30/2015
Transmission of High-Speed Serial Signals over Common Cable Media
TN1066 01.8 2/13/2012
Parallel Flash Programming and FPGA Configuration - Source Code
For use with Application Note - AN8077
AN8077 1.3 1/4/2013
Advanced Security Encryption Key Programming Guide
TN1215 1.5 1/30/2016
Dual and Mulitple Boot Feature
TN1216 1.6 10/30/2015
LatticeECP3-95EA Pinout
Note: a pin out file can be exported from Diamond version 1.3 or above.
1.2 4/15/2010
LatticeECP3-70EA Pinout
Note: a pin out file can be exported from Diamond version 1.3 or above.
1.3 4/15/2010
LatticeECP3-70E Pinout
Note: a pin out file can be exported from Diamond version 1.3 or above.
1.2 7/13/2009
ECP3 migration 17to70_484
1.2 4/6/2012
ECP3 migration 35to150_672
1.1 7/9/2009
ECP3 migration 70to95_484
1.1 7/9/2009
ECP3 migration 95to150_672
1.2 9/10/2012
ECP3 migration 35to95_484
1.2 9/10/2012
ECP3 migration 35to70_672
1.2 9/10/2012
ECP3 migration 70to150_672
1.2 9/10/2012
LatticeECP3-17EA Pinout
Note: a pin out file can be exported from Diamond version 1.3 or above.
1.6 1/24/2012
LatticeECP3-95E Pinout
Note: a pin out file can be exported from Diamond version 1.3 or above.
1.2 7/9/2009
LatticeECP3-35EA Pinout
Note: a pin out file can be exported from Diamond version 1.3 or above.
1.4 4/15/2010
ECP3 migration 35to95_672
1.2 9/10/2012
ECP3 migration 17to35_484
1.2 4/6/2012
ECP3 migration 70to95_672
1.1 7/9/2009
LatticeECP3-150EA Pinout
Note: a pin out file can be exported from Diamond version 1.3 or above.
1.5 4/15/2010
ECP3 migration 17to95_484
1.2 4/6/2012
ECP3 migration 17to35_256
1.2 4/6/2012
ECP3 migration 70to95_1156
1.1 7/9/2009
ECP3 migration 70to150_1156
1.2 9/10/2012
ECP3 migration 35to70_484
1.2 9/10/2012
ECP3 migration 95to150_1156
1.2 9/10/2012
MIPI D-PHY Bandwidth Matrix and Implementation
FPGA-TN-02090 1.2 6/19/2019
Package Diagrams
FPGA-DS-02053 5.8 6/24/2020
Sub-LVDS Signaling Using Lattice Devices
FPGA-TN-02028 1.8 6/24/2020
Reflow Temperature Guidelines and Moisture Sensitivity
FPGA-TN-02041 4.0 6/24/2020
标题 编号 版本 日期 格式 文件大小
LA-LatticeECP3 Automotive Family Data Sheet
FPGA-DS-02052 1.2 3/31/2019
LatticeECP3 EA Family Data Sheet
Note: EA devices only.
DS1021 2.8EA 3/24/2015
标题 编号 版本 日期 格式 文件大小
Electrical Recommendations for Lattice SERDES (Chinese Language Version)
TN1114C 02.8 10/12/2012
High-Speed PCB Design Considerations
TN1033 06.1 5/2/2011
High-Speed PCB Design Considerations (Chinese Language Version)
TN1033C 06.1 5/23/2011
Electrical Recommendations for Lattice SERDES
FPGA-TN-02077 3.0 3/30/2018
LatticeECP3 Hardware Checklist
TN1189 2.1 2/13/2012
LatticeECP3 High-Speed I/O Interface
TN1180 2.3 4/2/2013
LatticeECP3 sysCONFIG Usage Guide
TN1169 3.1 6/1/2015
LatticeECP3 and LatticeECP2M High-Speed Backplane Measurements
TN1149 1.5 10/7/2013
LatticeECP3 sysCLOCK PLL/DLL Design and Usage Guide
TN1178 2.6 2/3/2014
LatticeECP3 sysIO Usage Guide
TN1177 2.2 8/19/2013
LatticeECP3 Power Consumption and Management
TN1181 1.1 2/2/2012
LatticeECP3 Marvell SGMII Physical/MAC Layer Interoperability
TN1197 1.1 2/13/2012
LatticeECP3 SERDES/PCS Usage Guide (Chinese Language Version)
TN1176C 02.4 8/28/2012
LatticeECP3 SERDES/PCS Usage Guide (Japanese Language Version)
TN1176J 2.4 8/22/2012
LatticeECP3 Marvell XAUI 10 Gbps Physical Layer Interoperability
TN1194 1.1 2/13/2012
LatticeECP3 Slave SPI Port User Guide
FPGA-TN-02136 1.8 8/26/2019
LatticeECP3 SERDES/PCS Usage Guide
TN1176 2.8 8/26/2014
LatticeECP3 sysIO Usage Guide (Chinese Language Version)
TN1177C 02.0 6/26/2012
LatticeECP3 sysDSP Usage Guide
TN1182 1.3 2/13/2012
LatticeECP3 and Broadcom 1 GbE (1000BASE-X) Physical/MAC Layer Interoperability
TN1217 1.0 7/26/2010
LatticeECP3 and Marvell 10 Gbps Physical/MAC Layer Interoperability
TN1219 1.0 7/26/2010
LatticeECP3 SERDES/PCS Reset Sequence - Source Code
For use with Technical Note - TN1176
TN1176 1.1 2/4/2010
LatticeECP3 Marvell 1 GbE (1000BASE-X) Physical/MAC Layer Interoperability
TN1196 1.1 2/13/2012
LatticeECP3 Memory Usage Guide
TN1179 1.8 4/1/2014
LatticeECP3 and Broadcom 10 Gbps Physical/MAC Layer Interoperability
TN1218 1.1 2/13/2012
Low-Cost Serial RapidIO to TI 6482 Digital Signal Processor Interoperability with LatticeECP3
TN1214 1.1 10/18/2010
Minimizing System Interruption During Configuration Using TransFR Technology
TN1087 3.7 10/30/2015
Parallel Flash Programming and FPGA Configuration
Also download the implementation files for AN8077.
AN8077 1.3 3/1/2015
Soft Error Detection SED Usage Guide
TN1184 1.7 11/30/2015
Transmission of High-Speed Serial Signals over Common Cable Media
TN1066 01.8 2/13/2012
Parallel Flash Programming and FPGA Configuration - Source Code
For use with Application Note - AN8077
AN8077 1.3 1/4/2013
Advanced Security Encryption Key Programming Guide
TN1215 1.5 1/30/2016
Dual and Mulitple Boot Feature
TN1216 1.6 10/30/2015
MIPI D-PHY Bandwidth Matrix and Implementation
FPGA-TN-02090 1.2 6/19/2019
Sub-LVDS Signaling Using Lattice Devices
FPGA-TN-02028 1.8 6/24/2020
Reflow Temperature Guidelines and Moisture Sensitivity
FPGA-TN-02041 4.0 6/24/2020
标题 编号 版本 日期 格式 文件大小
LatticeECP3-95EA Pinout
Note: a pin out file can be exported from Diamond version 1.3 or above.
1.2 4/15/2010
LatticeECP3-70EA Pinout
Note: a pin out file can be exported from Diamond version 1.3 or above.
1.3 4/15/2010
LatticeECP3-70E Pinout
Note: a pin out file can be exported from Diamond version 1.3 or above.
1.2 7/13/2009
ECP3 migration 17to70_484
1.2 4/6/2012
ECP3 migration 35to150_672
1.1 7/9/2009
ECP3 migration 70to95_484
1.1 7/9/2009
ECP3 migration 95to150_672
1.2 9/10/2012
ECP3 migration 35to95_484
1.2 9/10/2012
ECP3 migration 35to70_672
1.2 9/10/2012
ECP3 migration 70to150_672
1.2 9/10/2012
LatticeECP3-17EA Pinout
Note: a pin out file can be exported from Diamond version 1.3 or above.
1.6 1/24/2012
LatticeECP3-95E Pinout
Note: a pin out file can be exported from Diamond version 1.3 or above.
1.2 7/9/2009
LatticeECP3-35EA Pinout
Note: a pin out file can be exported from Diamond version 1.3 or above.
1.4 4/15/2010
ECP3 migration 35to95_672
1.2 9/10/2012
ECP3 migration 17to35_484
1.2 4/6/2012
ECP3 migration 70to95_672
1.1 7/9/2009
LatticeECP3-150EA Pinout
Note: a pin out file can be exported from Diamond version 1.3 or above.
1.5 4/15/2010
ECP3 migration 17to95_484
1.2 4/6/2012
ECP3 migration 17to35_256
1.2 4/6/2012
ECP3 migration 70to95_1156
1.1 7/9/2009
ECP3 migration 70to150_1156
1.2 9/10/2012
ECP3 migration 35to70_484
1.2 9/10/2012
ECP3 migration 95to150_1156
1.2 9/10/2012
Package Diagrams
FPGA-DS-02053 5.8 6/24/2020
标题 编号 版本 日期 格式 文件大小
DDR2 Demo for the LatticeECP3 Serial Protocol Board
Describes the DDR2 Demo for use with the LatticeECP3 Serial Protocol Board.
UG49 5/22/2013
LatticeECP3 DDR3 Demo for the LatticeECP3 I/O Protocol Board User's Guide
UG38 01.4 6/8/2012
LatticeECP3 CPRI Demo Design User's Guide
UG26 01.2 5/3/2012
JESD207 IP Core User's Guide
IPUG111 1.0 8/27/2013
LatticeECP3 PCI Express Root Complex Lite x1 Native Demo
UG40 1.0 10/29/2010
LatticeECP3 Eye/Backplane Demo for the LatticeECP3 Serial I/O Protocol Board User's Guide
UG24 01.4 3/4/2011
LatticeECP3 Video Protocol Board - Revision B User's Guide
EB39 1.3 3/2/2010
LatticeECP3 AMC Serial RapidIO 2.1 Demo User's Guide
UG39 01.0 11/17/2010
LatticeECP3 XAUI Demo
UG23 01.3 6/16/2011
LatticeECP3 Serial Protocol Board - Revision D User's Guide
EB44 1.3 7/8/2010