SubLVDS至MIPI CSI-2图像传感器桥接

实现采用SubLVDS接口的高端工业和A/V图像传感器与MIPI CSI-2移动应用处理器的桥接

大多数现成的应用处理器使用工业标准接口,如MIPI CSI-2。然而工业和A/V市场的一些传统高端的图像传感器使用专用的接口,如SubLVDS。移动行业加速了应用处理器技术的许多进步,同时降低成本和功耗。许多新的应用程序想要利用移动的创新方案。同时,在现在的智能手机和平板电脑中,相机仍然是一个非常重要的功能。

Lattice CrossLink是可编程视频接口桥接器件,能够以高达6 Gbps速率为索尼图像传感器实现从SubLVDS至MIPI CSI-2的转换,并且支持所有分辨率和带宽的转换。Lattice Diamond提供该免费的桥接IP,便于您进行配置和设置。 

特性

  • Supports 4, 8, or 10 data lanes from Sony image sensor in 10-bit or 12-bit pixel widths
  • Interfaces to MIPI CSI-2 Devices with 1 clock lane and 4 data lanes up to 6 Gbps total bandwidth
  • Generates XVS & XHS for image sensors in slave mode operation
  • Handles Sony IMX SubLVDS image sensors such as IMX236, IMX172, IMX178, IMX226, etc.
  • Easily configurable through Lattice Clarity Designer included in Lattice Diamond Software

Block Diagram

Supported Configurations

Sony Sub-LVDS Input MIPI CSI-2 Output
4-lane, 10-bit RAW 4-lane, 10-bit RAW (RAW10)
4-lane, 12-bit RAW 4-lane, 12-bit RAW (RAW12)
6-lane, 10-bit RAW 4-lane, 12-bit RAW (RAW12)
6-lane, 12-bit RAW 4-lane, 12-bit RAW (RAW12)
8-lane, 10-bit RAW 4-lane, 10-bit RAW (RAW10)
8-lane, 12-bit RAW 4-lane, 12-bit RAW (RAW12)
10-lane, 10-bit RAW 4-lane, 10-bit RAW (RAW10)
10-lane, 12-bit RAW 4-lane, 12-bit RAW (RAW12)

Documentation

快速参考
标题 编号 版本 日期 格式 文件大小
SubLVDS to MIPI CSI-2 IP Image Sensor Interface Bridge
FPGA-IPUG-02006 1.4 5/10/2019 PDF 2 MB


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