These examples place a MachXO PLD in a 8x8 mm, 0.5 mm pitch, 100-ball csBGA package (LCMXO640-M100/MN100) into two fabrication scenarios. One for a 4-layer stack up with 100% I/O utilization and a second that uses some cost-cutting measures like relaxed trace width/space dimensions and 15% fewer I/Os.
Note: Example designs are not intended to be used for any particular application. Before applying any technique, confirm that your PCB fabrication service will support the dimensions specified.
| Specification | mm | mils |
|---|---|---|
| Trace Width/Space | 0.085/0.085 | 3/3 |
| Ball Pad | 0.23 | 9 |
| Ball Mask | 0.38 | 15 |
| Escape Via Pad | 0.45 | 18 |
| Escape Via Drill | 0.20 | 8 |
| Escape Via Mask | 0.60 | 24 |
| Plane Antipad Space | 0.55 | 22 |
| Thermal Relief | 0.65 | 26 |
| Layer 1 Primary |
Layer 2 GND |
| Layer 3 Power |
Layer 4 Secondary |
| Specification | mm | mils |
|---|---|---|
| Trace Width/Space | 0.10/0.10 | 4/4 |
| Ball Pad | 0.23 | 9 |
| Ball Mask | 0.38 | 15 |
| Escape Via Pad | 0.45 | 18 |
| Escape Via Drill | 0.20 | 8 |
| Escape Via Mask | 0.60 | 24 |
| Plane Antipad Space | 0.55 | 22 |
| Thermal Relief | 0.65 | 26 |
| Layer 1 Primary |
Layer 2 GND |
| Layer 3 Power |
Layer 4 Secondary |