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Lattice provides customers with low cost and low power programmable solutions that are ready-to-use right out of the box. For the wireless space, a full suite of tested solutions are available that include:
- FPGAs with Embedded SERDES compliant to CPRI, OBSAI, Serial RapidIO and JESD204 standards.
- FPGAs with I/O to Support High-Speed Parallel Interfaces Found on Data Conversion Devices.
- FPGAs with Embedded, High Performance DSP blocks.
- A Portfolio of Soft IP Cores and reference designs.
- Application Specific Development Boards and Demonstration Designs
- Test and Interoperability Reports for PMA, PCS and Generic I/O.
- Cooperation with leading ASSP Vendors and Intellectual Property (IP) Partners to Promote Joint System Solutions
LatticeECP2M: Industry Leading Programmable Wireless Platform
- Low Cost Digital SERDES
- Ideal for low cost chip-chip and small factor backplane applications
- Up to 16 Channels per Device
- Supports a wide variety of CPRI and OBSAI topologies
- Very Low Power
- 87mW Per Channel (Typical @ 2.5Gbps)
- Low Cost, High Performance FPGA Fabric with:
- High Performance DSP blocks
- High Performance I/O
- High Density Embedded Block Ram (EBR)
- Small Form Factor
- 17x17 wirebond packages are industry's smallest for SERDES based FPGAs
- Complete End to End Solution
- Soft IP implementations for connectivity and RF/BB processing applications
- (Learn more)
Intellectual Property: Rich Portfolio of Soft IP and Reference Designs
Lattice provides a comprehensive portfolio of soft and hard wireless IP including Connectivity support such as CPRI/OBSAI. Also available are reference designs in support of data conversion as well as other signal processing functionality. By targeting the LatticeECP2M platform, developers will drastically reduce cost, power and footprint over competitive solutions.
Wireless IP Portfolio
| Function |
LatticeECP2M |
| Serial Baseband Interconnect |
- Low Latency CPRI IP Core for Baseband Data Transport
- RP3-01 OBSAI IP Core for Baseband Data Transport
- SRIO IP Core for Baseband and RRH Chip-to-Chip Interconnect from Praesum Communications
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| Data Conversion |
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| Signal Processing Reference Designs and IP |
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| DSP Building Blocks |
- Listing of DSP IP cores and reference designs from Lattice and our ispLeverCORE Connections Partners
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| Embedded Processors |
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Development Boards and Demonstration Designs
Lattice Development Kits combine application specific evaluation boards, IP and relevant reference designs in one comprehensive package. The Solution Kits allow a potential user to quickly and seamlessly evaluate the Lattice Wireless Solutions portfolio, and to use it as a basis for customer specific development.
Electrical (PMA) Testing
To ensure compliance to 1000BaseX standards, we have tested our SERDES Physical Medium Attachment (PMA) to relevant ANSI 11.2 and IEEE802.3 specifications. Testing methdology and results can be found below:
PMA Electrical Characterization
- TN1084 and Supplements (available under NDA) for PCI Express Transmit Jitter Specifications.
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