Lattice 7:1 LVDS Video Interface

The 7:1 LVDS Interface is an economical method to transfer large amounts of data over short distances using the age-old signal multiplexing techniques. The 7:1 LVDS multiplexing scheme can transfer up to 7 data signals through an LVDS channel (one differential pin pair) during one clock cycle. It is commonly used to move data from chip-to-chip or board-to-board within electronic systems. A popular application is to connect motherboards with LCD screens in laptop and netbook computers as shown on right.

The Video Display applications use either three, four or five LVDS Data channels and a clock channel to transfer pixel data. The number of data channels selected depends on the required color depth for the application. The LatticeECP3 FPGA based designs can be configured to drive LVDS channels at frequencies up to 107 MHz, which translates into maximum data rates of 750 Mbps per channel. The Lattice FPGAs based 7:1 LVDS receivers tune to the reference clock frequency automatically and allow customers to integrate video processing functionality on the same device.

The 7:1 LVDS Video Interface is ideal for embedded applications where the designers need to select in real-time one of the video sources for a display device or conversely direct one video feed to multiple display devices. The first application is called a Video/Graphics Multiplexer and the second is called Video/Graphics Demultiplexer. The following picture illustrates a Video Demultiplexer (DEMUX) application in a Dual LCD Camera. Such leading-edge cameras have a big LCD screen on the back and a small LCD screen on the front. The LatticeXP2 FPGA based DEMUX design is used to process the captured image and send it to two LCD screens with different sizes and resolutions.

Lattice provides an extensive portfolio of Silicon Devices, IP Cores, Reference Designs, Evaluation Boards, Design Examples, and Documentation to enable the development of customized 7:1 LVDS solutions.