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PDA

PDAs enable users to transfer data between a handheld device and a desktop or laptop PC. Users can input data by tapping keys of a mini keyboard or by writing using a stylus on a screen. They can be used to communicate with the internet using a wireless connection and access information such as email, stocks, weather and news. Consumer demand for PDAs continues to grow rapidly due to their small form factor, ease of use and declining prices.

In a typical PDA (shown in Figure 1), the microprocessor is the main functional block of the system and manages all PDA functions according to programmed instructions. The PDA has a small amount of memory, an LCD screen and can be connected to a desktop, cell phone, printer or other peripheral using an infrared port (IrDA) or RS232 interface. Lattice PLDs are ideal for memory controller, power management, LCD controller, interface bridging, I/O expansion and voltage level shifting functions.

Figure 1: Example of Lattice PLD Solution for PDA

 

PDA System Diagram
 

Low-Cost Programmable Solutions for PDAs

The MachXO2™ family is designed to offer an unprecedented mix of low cost, low power and high functional integration. Combining an optimized look-up table (LUT) architecture with 65-nm embedded flash process technology, MachXO2 devices provide designers the benefits of lower cost, reduced power consumption, and increased system integration in a small footprint offering a “Do-it-All PLD” for high volume, cost sensitive, low-power applications.

Designed for low-cost and ultra low power, Lattice’s ispMACH 4000ZE CPLDs can be used for LCD control, glue logic, power management, touchpad monitoring, and voltage level shifting.

The MachXO family of of non-volatile, infinitely reconfigurable PLDs is designed for applications traditionally implemented using CPLDs or low-capacity FPGAs. Combining an optimized look-up table (LUT) architecture with low-cost embedded flash process technology, the instant-on, easy to use MachXO PLDs are ideal for general purpose I/O expansion, control, bus bridging and power-up management functions.

The LatticeXP2 devices combine a look-up table (LUT) based FPGA fabric with flash non-volatile cells in an architecture referred to as flexiFLASH providing the benefits of of instant-on, small footprint, on-chip storage with FlashBAK embedded block memories, serial TAG memory and design security. The instant-on, non-volatile features of the LatticeXP2 devices make them ideal for functions such as interface bridging, address decoding and timing control.

The LatticeECP2™ and LatticeECP2M™ families redefine the low-cost FPGA category, by integrating features and capabilities previously only available on higher cost / high performance FPGAs. Featuring up to 100K look-up table (LUT) capacity, 5.3 Mbits of embedded memory, pre-engineered source synchronous I/O, bitstream encryption and embedded SERDES including PCI Express, and Ethernet (1 GbE & SGMII), these families are ideal for high speed LVDS digital video and image processing applications.

 

Reference Designs and Development Kits

Functions integrated into many consumer electronics applications are available from Lattice as Reference Designs. Reference Designs can be downloaded from the Lattice website free of charge. Development Kits from Lattice typically include an evaluation board, pre-programmed demonstration design, firmware, and documentation to speed new PLD design projects.

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