Flat panel display technologies include liquid crystal displays (LCDs), plasma display panels (PDP), organic light emitting diode (OLED), digital light processing (DLP) and electro-luminescent displays (EL). Displays are used in a wide range of products including TV sets, car navigation systems, digital video cameras, portable games and cell phones. The basic principle of a display is to receive, decode and display a digital video signal from a video source. Rapidly declining prices coupled with strong demand for large screen sizes, high image quality, and ultra thin profiles have fueled the rapid growth of displays in consumer electronics.
Shown in Figure 1 is a typical block representation of a Lattice PLD solution used for flat panel display. The video board performs various image processing functions such as de-interlacing, gamma correction, scaling, color space conversion and brightness/contrast control as well as front end signal processing. The 7:1 source synchronous LVDS interface (also known as channel link, flat link, and camera link) is used to reduce the number of wires and EMI interference between the video board and display panel. Lattice's 7:1 LVDS video interface reference design is optimized for use with the LatticeECP2/M family of FPGAs. The display panel performs functions such as image dithering, LED and timing control. The timing control provides the video signal to the column and row drivers on the LCD panel to display the image.
Lattice offers a wide range of intellectual property (IP) cores for display applications. These include cores that are internally developed as well as those that are developed, supported and sold by 3rd party partners. Lattice also provides reference designs for display applications that can be downloaded from the Lattice website free of charge.
The MachXO2™ family is designed to offer an unprecedented mix of low cost, low power and high functional integration. Combining an optimized look-up table (LUT) architecture with 65-nm embedded flash process technology, MachXO2 devices provide designers the benefits of lower cost, reduced power consumption, and increased system integration in a small footprint offering a “Do-it-All PLD” for high volume, cost sensitive, low-power applications.
The LatticeECP2™ and LatticeECP2M™ families redefine the low-cost FPGA category, by integrating features and capabilities previously only available on higher cost / high performance FPGAs. Featuring up to 100K look-up table (LUT) capacity, 5.3 Mbits of embedded memory, pre-engineered source synchronous I/O, bitstream encryption and embedded SERDES including PCI Express, and Ethernet (1 GbE & SGMII), these families are ideal for high speed LVDS digital video and image processing applications.
The LatticeXP2 devices combine a look-up table (LUT) based FPGA fabric with flash non-volatile cells in an architecture referred to as flexiFLASH providing the benefits of of instant-on, small footprint, on-chip storage with FlashBAK embedded block memories, serial TAG memory and design security. The instant-on, non-volatile features of the LatticeXP2 devices make them ideal for display functions such as interface bridging, address decoding and timing control.
The MachXO™ family of of non-volatile, infinitely reconfigurable PLDs is designed for applications traditionally implemented using CPLDs or low-capacity FPGAs. Combining an optimized look-up table (LUT) architecture with low-cost embedded flash process technology, the instant-on, easy to use MachXO PLDs are ideal for general purpose I/O expansion, control, bus bridging and power-up management functions.
Designed for low-cost and ultra low power, Lattice’s ispMACH 4000ZE CPLDs can be used for power management, LED control, keypad monitoring, voltage level shifting and general purpose I/O expansion for processors.
© Lattice Semiconductor Corporation 2012
