Digital cameras store images digitally rather than recording them on film. They have replaced 35-mm cameras as they offer better image quality, smaller form factor and lower price. Pictures can be viewed on the camera’s built-in LCD screen and can be edited and sent via e-mail. Digital camcorders record digital video and audio onto an internal storage device, such as DVD or flash memory. Technology advances in sensors, pixel resolution and memory capacity have caused prices of digital cameras and camcorders to decline significantly over the last couple of years, giving the user a broad range of options to choose from.
A typical digital camera includes a sensor (CCD), image processor, graphics controller, memory storage and an LCD display. Lattice PLDs and CPLDs can be used to implement a graphics controller in digital cameras reducing the time-to-market, providing flixibility to implement differentiated features and enable a higher degree of integration leading to savings in board real estate.
As LCD screens become more and more popular, display manufacturers continue to bring to market different types of screens that address consumer needs at a lower cost. Different LCD screens have different resolution, color depths, and interface timing requirements. By using a PLD based graphics controller, designers can use their current CPU or applications processor with newer versions of LCD displays. PLDs can also be used for image rotation and image scaling. These functions are often needed to support multiple displays. PLDs provide cost effective image rotation and image scaling functions eliminating the need to upgrade the CPU or application processor. Advanced functions such as gamma correction and color space conversion can also be implemented in programmable logic providing a higher degree of system integration.
Lattice IP and reference designs for graphics controller applications include commonly used memory controller functions and control interfaces. Lattice memory controller IP and reference designs enable designers to rapidly implement and prototype interfaces to external frame buffers and bulk storage.
Functions integrated into many consumer electronics applications are available from Lattice as Reference Designs. Reference Designs can be downloaded from the Lattice website free of charge. Development Kits from Lattice typically include an evaluation board, pre-programmed demonstration design, firmware, and documentation to speed new PLD design projects.
The MachXO2™ family is designed to offer an unprecedented mix of low cost, low power and high functional integration. Combining an optimized look-up table (LUT) architecture with 65-nm embedded flash process technology, MachXO2 devices provide designers the benefits of lower cost, reduced power consumption, and increased system integration in a small footprint offering a "Do-it-All PLD" for high volume, cost sensitive, low-power applications.
Designed for low-cost and ultra low power, Lattice’s ispMACH 4000ZE CPLDs can be used for LCD control, power management, level shifting and glue logic.
The MachXO™ family of non-volatile, infinitely reconfigurable PLDs is designed for applications traditionally implemented using CPLDs or low-capacity FPGAs. Combining an optimized look-up table (LUT) architecture with low-cost embedded flash process technology, the instant-on, easy to use MachXO PLDs are ideal for general purpose I/O expansion, control, bus bridging and power-up management functions.
© Lattice Semiconductor Corporation 2012
