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Automotive Quality


ISO/TS-16949 Quality

Lattice Semiconductor Corporation achieved certification of its quality systems to Automotive Industry Quality Standard ISO/TS 16949 in November of 2006. The certification is formal recognition that Lattice provides its automotive customers with programmable devices that meet rigorous standards for quality and reliability. Lattice has previously satisfied the stringent requirements of additional quality standards, including ISO 9001 and MIL-PRF-38535.


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AEC-Q100 Devices

The AEC-Q100 is defined by the Automotive Electronics Council as a “Stress Test for Qualification for Integrated Circuits.” The AEC-Q100 standard also includes customer specific requirements (CSR). ISO/TS-16949 is an international standards Automotive Quality Systems technical specification. It was defined for the purpose of establishing common part-qualification and quality-system standards. It containing detailed qualification and re-qualification requirements and include unique test methods and guidelines for the use of generic data. Components meeting these specifications are suitable for use in the harsh automotive environment without additional component level qualification testing.

Electronic system suppliers to the automotive market increasingly require that semiconductor suppliers provide products compliant to the AEC-Q100 standard and ISO/TS-16949 certification of their quality systems. Lattice is an Associate Member of the AEC.

Lattice AEC-Q100 Qualified Devices:


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Production Part Approval Process - PPAP

PPAP is a set of document provided by suppliers providing detailed testing, quality and reliability information for the AEC-Q100 automotive qualified devices. Lattice provides 4th edition PPAP documentation for all of its AEC-Q100 qualified devices.

Zero-Defects

Initiative by the Automotive Electronics Council for manufactures to develop and use the best design methodologies to reduce the chance of field failures. This is performed by implementing additional device tests to obtain a field failure rate of 0ppm. Lattice Semiconductor is a member of the AEC and is aggressively pursuing the goal of zero-defects.