Single Chip, Secure Solutions

LatticeXP2 FPGAs

LatticeXP2 devices combine an efficient FPGA fabric with non-volatile Flash cells in an architecture that was optimized from the outset with high performance and low cost in mind. LatticeXP2 FPGAs offer 5K to 40K LUTs, distributed and embedded memory, Phase Locked Loops (PLLs), pre-engineered source synchronous I/O and enhanced sysDSP.

• XP2 Handbook (PDF, 8 MB)

MachXO Crossover PLDs

The MachXO family combines the best attributes of CPLDs and FPGAs to serve applications that traditionally were implemented in CPLDs or low capacity FPGAs. MachXO devices include PLLs and embedded memory along with other features you wouldn’t normally expect in a CPLD.

• MachXO Handbook (PDF, 5 MB)