The Universal Asynchronous Receiver Transmitter (UART) is a popular and widely-used device for data communication in the field of telecommunication. This reference design is a fully configurable UART functionally compatible with the NS16450 UART.
| Device Family | Tested Devices* | Performance | I/O Pins | Design Size | Revision |
|---|---|---|---|---|---|
| MachXO2™ | LCMXO2-256HC-5TG100C | >120MHz | 37 | 206 LUTs | 1.5 |
| MachXO™ | LCMXO256C-4T100C | >120MHz | 37 | 205 LUTs | 1.5 |
| LatticeXP2™ | LFXP2-5E-5M132C | >120MHz | 37 | 211 LUTs | 1.5 |
| ispMACH® 4000ZE | LC4128ZE-5TN100C | >120MHz | 37 | 139 Macrocells | 1.5 |
| Platform Manager™ | LPTM10-1247-3TG128CES | >120MHz | 37 | 208 LUTs | 1.5 |
1. Performance and utilization characteristics generated using the specified test device and Lattice Diamond™ 1.2 software.
2. Performance and utilization characteristics generated using the specified test device with ispLEVER Classic 1.4 software.
3. Performance and utilization characteristics generated using the specified test device with ispLEVER 8.1 SP1 software (Starter or full license version)
download design documentation (RD1011)
* May work in other devices as well.
Note: The performance and design sizes shown above are estimates only. The actual results may vary depending upon the chosen parameters, timing constraints, and device implementation. See the design's documentation for details. All coding and design work was done on a PC platform unless noted otherwise.
© Lattice Semiconductor Corporation 2013
