Sony IMX036 / IMX136 Sensor With subLVDS To Parallel Sensor Bridge

With Sony's introduction of the IMX136 and the IMX036 sensors that support resolutions up to 1080P, the traditional CMOS parallel interface was no longer able to handle the bandwidth requirements. To support the higher bandwidth needs of the IMX136 and IMX036 sensors, Sony utilizes a parallel DDR sub-LVDS interface. This 12-bit parallel sub-LVDS DDR interface can operate up to 297Mpbs to support 1080p120 resolution.  To support up to 1080p60 resolution requires 148Mbps interface speeds.  To interface the IMX136 or IMX036 to a CMOS parallel bus ISP, Lattice has created a reference design to convert the sub-LVDS DDR parallel format to a CMOS parallel format. The LatticeMachXO2-1200 or the LatticeXP2™-5 non-volatile FPGA provides an efficient and cost-effective solution for bridging parallel sub-LVDS.

Key Features

• Complete Reference Design in MachXO2-1200 or XP2-5
• Designed to Emulate Parallel Sensor Output Bus Width of 10 or 12 Bits
• Tested with Sony IMX036 and TI DM814X at 1080p60
• Sub-LVDS DDR Data Converter to CMOS SDR Data
• Converts the Sub-LVDS Sync Commands to Valid Signals
• Bridge Device Offered in Space-saving 8x8 mm 132-Ball csBGA. TQFP Packages Also Available.
• Requires No External PROM
• Parallel Interface can be Configured for 1.8V, 2.5V or 3.3V LVCMOS Levels

Sub-LVDS-to-Parallel Sensor Interface Bridging Block Diagram