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Complementing Lattice's ispLeverCORE™ IP cores are powerful, free of charge reference designs, which have been optimized for Lattice programmable products. These designs provide you with a great starting point and ultimately help improve time to market. Lattice Reference Designs tend to be more routine functions and are available for download as HDL (Verilog and/or VHDL) source code.
Learn about Lattice IP Cores and Reference Designs
Each Lattice Reference Design has a web page that provides a brief overview of that function and available options. Complete details can be found in the documenation for that particular design. The documentation, along with the actual source code, can be downloaded from the web pages.
Factory Configurable
IPexpress User Configurable
Standard Configurable
Lattice Reference Designs
| Name |
Function |
Device Family |
| ECP3 | ECP2M | ECP2 | SCM | SC | XO | XP2 | XP | ECP/EC | XPGA | FPSC | ORCA4 | CPLD |
| 1553 Encoder/Decoder |
Connectivity |
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| 7:1 LVDS Video Interface for LatticeECP2/M |
Processors, Controllers and Peripherals |
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| 8b/10b Encoder/Decoder |
Communications |
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| Compact Flash Memory Controller |
Processors, Controllers and Peripherals |
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| Control Plane Serial Interface |
Connectivity |
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| DDR SDRAM Controller |
Processors, Controllers and Peripherals |
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| Digital Up/Down Converters (DUC, DDC) |
Communications, DSP |
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| ECC Module |
Communications |
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| Fast Page Mode DRAM Controller |
Processors, Controllers and Peripherals |
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| HDLC Controller |
Communications |
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| HiGig™/HiGig+ to SPI4 Bridge |
Communications |
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| I2C (Inter-Integrated Circuit) Bus Controller for Serial EEPROM |
Connectivity |
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| I2C (Inter-Integrated Circuit) Bus Controller with WISHBONE Controller |
Connectivity |
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| I2C (Inter-Integrated Circuit) Bus Master |
Connectivity |
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| JESD204 ADC |
DSP |
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| LatticeMico8 Microcontroller |
Processors, Controllers and Peripherals |
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| LatticeMico8 to WISHBONE Interface Adapter |
Processors, Controllers and Peripherals |
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| Least Mean Square (LMS) Adaptive Filter |
DSP |
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| LPC (Low Pin Count) Bus Controller |
Processors, Controllers and Peripherals |
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| Name |
Function |
Device Family |
| ECP3 | ECP2M | ECP2 | SCM | SC | XO | XP2 | XP | ECP/EC | XPGA | FPSC | ORCA4 | CPLD |
| Multiple Boundary Scan Port Addressable Buffer (BSCAN-1) |
Connectivity |
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| Multiple Boundary Scan Port Linker (BSCAN2) |
Connectivity |
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| PCI to NOR Flash Interface |
Connectivity |
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| PCI Target 32-bit/33MHz |
Connectivity |
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| PCI/WISHBONE Bridge |
Connectivity |
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| POS PHY Level 3 Link |
Communications |
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| QDR SRAM Memory Controller |
Processors, Controllers and Peripherals |
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| Read and Write Usercode |
Connectivity |
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| RGMII to GMII Bridge |
Communications |
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| SDRAM Controller - Advanced |
Processors, Controllers and Peripherals |
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| SDRAM Controller - Standard |
Processors, Controllers and Peripherals |
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| SPI (Serial Peripheral Interface) WISHBONE Controller |
Connectivity |
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| Telecom Bus Bridge for SONET Cross Connect |
Communications |
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| UART (Universal Asynchronous Receiver/Transmitter) |
Communications |
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| WISHBONE-Compatible LCD Controller |
Processors, Controllers and Peripherals |
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| WISHBONE UART |
Processors, Controllers and Peripherals |
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| XAUI to SPI4 Bridge |
Communications |
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