I2C and SPI are the two widely-used bus protocols in today’s embedded systems. The I2C bus has a minimum pin count requirement and therefore a smaller footprint on the board. The SPI bus provides a synchronized serial link with performance in MHz range. As embedded systems are required to support an increasing number of protocols and interfaces, bridge designs targeting popular protocols provide solutions to reduce development time and cost. This reference design implements an I2C slave to SPI master bridge. It serves as an interface between the standard I2C bus of a microcontroller and a SPI bus. This allows the microcontroller to communicate directly with the SPI bus through its I2C bus.
| Device Family | Tested Devices* | Language | Performance | Architecture Resources |
Design Size | Revision |
|---|---|---|---|---|---|---|
| MachXO™ | LCMXO1200C-3T100C | Verilog/VHDL | >40MHz | 1 EBR | 215/213 LUTs | 1.1 |
| Platform Manager™ | LPTM10-1247-3TG128CES |
Verilog/VHDL |
>40MHz | N/A | 421/424 LUTs | 1.1 |
download design documentation (RD1094)
* May work in other devices as well.
Note: The performance and design sizes shown above are estimates only. The actual results may vary depending upon the chosen parameters, timing constraints, and device implementation. See the design's documentation for details. All coding and design work was done on a PC platform unless noted otherwise.
© Lattice Semiconductor Corporation 2013
