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Digital Up Converters (DUC) and Digital Down Converters (DDC) are widely used in communication systems for converting the sample rate of signals. Digital up conversion is required when a signal is translated from baseband to intermediate frequency (IF) band. Digital down conversion happens when a signal is converted from intermediate frequency band to baseband. DUCs and DDCs typically include frequency shifting using mixers, in addition to sampling rate conversion. The structure of a DUC or DDC depends mainly on the conversion ratio that is required. For WiMAX (Worldwide Interoperability for Microwave Access) systems, the conversion ratio is typically in the order of 8 to 10. For such low conversion rates, the DUC or the DDC is constructed using FIR filters only. If the required conversion ratio is much higher, a cascaded integrator-comb (CIC) filter is used in the DDC/DUC structure.
Lattice’s DDC/DUC reference design addresses the 10 MHz bandwidth channels for Wireless-MAN or Wireless-HUMAN PHY for WiMAX systems. An IF sampling frequency of 89.6 MHz is used for this reference design.
These reference designs use two ispLeverCORE IP Cores; the Finite Impulse Response (FIR) Filter and the Numerically Controlled Oscillator (NCO). See the additional license requirements below for details.
Digital Up Converter (DUC) Block Diagram:

Digital Down Converter (DDC) Block Diagram:

Features:
- Compliant with the WiMAX transmit spectral mask
- Complex DDC/DUC (I and Q channels) for sampling frequency of 89.6 MHz
- 18-bits data and coefficient widths, with pre-determined coefficient values
- Includes evaluation test bench and scripts for simulation and implementation
- Includes scripts to create IPs and simulation libraries
- Self-checking test bench with programs to generate golden output
- Verilog source code is provided to enable customization of the design
Deliverables:
Utilization and Performance Data1 :
| Configuration |
Resource Utilization |
fMAX (MHz) |
| Slices |
LUTs |
REGs |
EBRs |
18x18 MULTs |
|
DUC
|
1093
|
1742
|
2180
|
34
|
28
|
180.9
|
|
DDC
|
1157
|
1742
|
2304
|
34
|
28
|
189.5
|
1) For ECP2M using ispLEVER v7.0 SP2. See User Guide for complete details.
Additional License Requirements:
NOTE: Both the FIR and NCO IP cores must first be installed using IPexpress to implement these reference designs, but no manual configuration is necessary. The DDC and DUC reference designs will configure the IP cores as needed. The IP cores provide a free FPGA evaluation period which also applies to the reference design. Please see the Introduction in the User Guide for more details about the use of these cores in this reference design.
For licenses and support, please contact your local Lattice sales office. |
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