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Circuit Board Fault Monitoring and Logging

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Lattice Reference DesignsFor systems using microprocessors or computers there are usually numerous power supplies. If a power supply fails the power manager circuits may, as a minimum, force a shutdown. For maintenance and troubleshooting it is very desirable to know which power supply failed and the type of failure condition (over-voltage or under-voltage).

This Reference Design for the Platform Manager presents a solution that records the supply fault condition in non-volatile memory so the fault(s) can read back at a later time. This solution is fast, reliable, and cost effective because it is based on a Platform Manager and and external non-volatile SPI Flash memory. This reference design is compatible with the Platform Manager Development Kit.

Features

 

Platform Manager Fault Logger Diagram Sml 

 

Tested Devices* FPGA
LUTs
CPLD
Macrocells
CPLD
Product Terms
VMONs I/Os Timers HVOUTs Revision
LPTM10-12107 400   31 147   3  60  2  - 1.0

See also: Power Manager II Fault Logger, Reference Design RD1060 for MachXO.

 

PDF file download design documentation (RD1077)

EXE files download source code

 

* May work in other devices as well.

Note: The performance and design sizes shown above are estimates only. The actual results may vary depending upon the chosen parameters, timing constraints, and device implementation. See the design's documentation for details. All coding and design work was done on a PC platform unless noted otherwise.  

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