Analog-to-Digital Converters (ADCs) are used to convert analog signals into digital representations that can be communicated and processed using digital logic. This ADC reference design (RD1089) provides an example of how the LatticeECP3 or LatticeECP2FPGA can be used to interface to a high-speed ADC device. Specifically, this ADC interface reference design supports the ability to interface with the Texas Instruments (TI) ADS64XX family of ADCs via LatticeECP3 FPGA high-speed LVDS I/O. The ADS64XX ADCs are high-performance ADC converters that use serial LVDS data outputs to reduce the number of interface signals required. This reference design receives data samples input via either one or two high-speed LVDS signals and converts the serial data to parallel word format.
ADC Interface (RD1089) Block Diagram
| ADC Interface | |
| Download User Guide (pdf) |  |
| Reference Design (zip) |  |
| FPGA Family | Speed Grade | LUTs | fMAX (MHz) | I/Os | Architecture Resources |
|---|---|---|---|---|---|
| LatticeECP31 | -6 | 373 | >200 | 42 | 3 IDDRs |
| LatticeECP22 | -5 | 417 | >200 | 42 | 3 IDDRs |
1. Performance and utilization characteristics are generated using a LFE3-70EA-6FN484CES, with Lattice ispLEVER 8.0 software. When using this design in a different device, density, speed, or grade, performance and utilization may vary.
2. Performance and utilization characteristics are generated using LFE2-6E-5T144C, with Lattice ispLEVER 8.0 software. When using this design in a different device, density, speed, or grade, performance and utilization may vary.
© Lattice Semiconductor Corporation 2012
