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PCI Express Endpoint IP Core Demo for LatticeECP2M and LatticeSCM

Documents & Downloads

Overview

The PCI Express (PCIe) Endpoint IP Core demo shows the capabilities of Lattice's PCI Express cores to function in a PCIe slot within a Windows-based PC. The demo is simply, easy-to-use, and requires no test equipment or lengthy setup. 

The demo consists of hardware, IP, and software. It runs on standard LatticeECP2M and LatticeSC PCI Express Evaluation Boards. A pre-configured bitstream is provided for each board.  The software includes a simple application along with an API and device drivers to enable the application to communicate with devices on either of the Evaluation Boards and demonstrate PCIe operation. Device driver and application source code are available so a user can modify and extend the behavior of the tests or use them as a starting point for their own designs. The demo includes two modes of operation - a menu mode driven from a DOS window which includes configuration, read/write from/to register capability, memory access capability, some simple tests, and a graphics mode which includes the same capabilities.

PCIe Demo for LatticeECP2M

Lattice PCIe Demo

Features

  • Reads and displays information about the PCIe core, including configuration registers, extended capability registers, and control registers
  • Performs GPIO register access
  • Performs memory access
  • Includes LatticeECP2M and LatticeSCM device-specific bitstreams for PCI Express x1 and x4 endpoint IP cores

 

Documentation

PDF file PCI Express Demo User's Guide

 

Demo Package

The demo package is released as a zipped file. Simply download the file and unzip it. The pre-configured bitstream along is included, and must be loaded into the LatticeECP2M or LatticeSCM device. Other Lattice tools that may be needed are ispVM® System software to download the bitstream, and ispLEVER® design tools if any changes to the design are to be made.  The application and driver are also included and must be installed prior to running the demo.

EXE files PCI Express x1 Demo for LatticeECP2M
EXE files PCI Express x4 Demo for LatticeECP2M
EXE files PCI Express x1 Demo for LatticeSCM
EXE files PCI Express x4 Demo for LatticeSCM


For information on the device driver and application source code, please contact your local Lattice Sales Office


Top-Level RTL Instantiation Template

Each PCI Express sample design supported by the demo package has a top-level RTL reference source file.  This top-level source file may be used as an instantiation template for the PCI Express IP core provided in the top-level directory (e.g. <project_dir>pcie_x1_eval<username>src tl op) of an actual design.

Top-level RTL reference source files for PCI Express x1 and x4 cores are available for the LatticeECP2M and LatticeSCM devices below.

EXE files PCI Express x4 Top-Level Source Files for LatticeECP2M-50
EXE files PCI Express x1 Top-Level Source Files for LatticeSCM-15
EXE files PCI Express x1 Top-Level Source Files for LatticeSCM-25
EXE files PCI Express x4 Top-Level Source Files for LatticeSCM-80
 

Evaluation Boards

 

To find out more about this demo or about the PCI Express x1 Endpoint IP Core, please contact your local Lattice Sales Office