The LatticeMico8 (prior to version 3.2) used to be a flexible reference design written in Verilog and VHDL suitable for a wide variety of markets, including communications, consumer, computer, medical, industrial, and automotive. This reference design is licensed under the open intellectual property (IP) core license. Below is the block diagram of the reference design
Version 3.15 of the LatticeMico8 increases addressable code space, has configurable address range and improved stack operations for support of high-level compilers, while keeping a very small footprint. The code will run on ispLever 5.1 and later. The predefined ispLever project (i.e. .syn) files are valid for 8.0 and later.
LatticeMico8 Core Source Code Revision 3.15 Verilog Only
Technote 1095 - Using the LatticeMico8 Microcontroller with the LatticeXP Evaluation Board
The development tools consist of a LatticeMico8 port of version 4.4.3 of the GNU Compiler Collection (GCC) and version 2.18 of GNU Binary Utilities (binutils - assembler, linker and more). These tools are a collection of command line executables hosted on a Linux/Unix or Cygwin (Linux/Unix terminal emulation for Windows) environment.
The toolchain outputs an executable in the ELF format. A deployment tool converts the ELF format executable into a memory output file (.MEM file) which can be used for simulation or as input into Lattice Diamond or ispLever development tools.
LatticeMico8 Development Tools Usage Guide
Writing Efficient C Code for the LatticeMico8 Microcontroller
NEW - LatticeMico8 Development Tools Installer for Windows - LatticeMico8 Core Revision 3.15
NEW - LatticeMico8 Development Tools Installer for Linux - LatticeMico8 Core Revision 3.15
NEW - LatticeMico8 Development Tools Source Code - LatticeMico8 Core Revision 3.15
LatticeMico8 Core Source Code Revision 3.1 Verilog
The above source code is the Verilog source code for ispLEVER version 8.0 and above
LatticeMico8 Core Source Code Revision 3.1 VHDL - NEW
The above source code is the VHDL source code for ispLEVER version 8.0 and above
LatticeMico8 Core Source Code Revision 3.0 Verilog
The above source code is the Verilog source code for ispLEVER version 7.0 and above.
LatticeMico8 Core Source Code Revision 3.0 VHDL
The above source code is the VHDL source code for ispLEVER version 7.0 and above.
LatticeMico8 Core Source Code Revision 2.4 Verilog
The above source code is the Verilog source code for ispLEVER version 6.0 and above.
LatticeMico8 Core Source Code Revision 2.4 VHDL
The above source code is the VHDL source code for ispLEVER version 6.0 and above.
LatticeMico8 Core Source Code Revision 2.3 Verilog
The above Verilog source code supports the LatticeECP2, the LatticeECP/EC, LatticeXP, and MachXO devices. Additionally, this version handles a larger number of instructions (1024 for LatticeECP2) and supports a bigger jump/branch (2048). For new designs, it is recommended to use Revision 2.4.
LatticeMico8 Core Source Code Revision 2.3 VHDL
The above VHDL source code supports the LatticeECP2, the LatticeECP/EC, LatticeXP, and MachXO devices. Additionally, this version handles a larger number of instructions (1024 for LatticeECP2) and supports a bigger jump/branch (2048). For new designs, it is recommended to use Revision 2.4.
LatticeMico8 Core Source Code Revision 2.2 Verilog Only
The above source code has a couple of bug fixes and has been fully tested for the MachXO family of Crossover Programmable Logic devices.
LatticeMico8 Core Source Code Revision 1.0 Verilog Only
LatticeMico8 Tools Code for Core Revision 3.1 and above
The above tools package contains both the source code and the executable files for the LatticeMico8
LatticeMico8 Tools Code for Core Revision 3.0
The above tools package contains both the source code and the executable files for the LatticeMico8
LatticeMico8 Tools Code for Core Revision 2.3
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