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A NEW VERSION OF THIS IP CORE IS AVAILABLE. PLEASE VISIT SGMII-GBE PCSOverview
The 1000BASE-X physical layer, also referred to as the GbE physical layer, consists of three major blocks, the Physical Coding Sublayer (PCS), the Physical Medium Attachment sublayer (PMA), and the Physical Medium Dependent sublayer (PMD). The LatticeECP2M™ embedded SERDES/PCS performs the PMA function, and portions of the PMD and PCS functions, including link serialization/deserialization, code-group alignment, clock tolerance compensation buffering, and 8b10b encoding/decoding. However, the embedded SERDES/PCS does not provide all necessary functions for implementing a complete GbE physical layer solution. That’s where the GbE PCS IP core comes in. The IP core provides the additional functions required to fully implement the PCS functions of the GbE physical layer. These additional functions include a transmit state machine, a receive state machine, and auto-negotiation.
Features
The GbE PCS is a user-configurable IP core, which allows the configuration of the IP and generation of a netlist and simulation file for use in designs. Please note that generating a bitstream may be prevented or the bitstream may have time logic present unless a license for the IP is purchased.
Resource Utilization
Ordering InformationPart Numbers:
To download a full evaluation version of this IP, please go to the Lattice IP Server tab in the IPexpress Main Window. All ispLeverCORE IP modules available for download are visible on this tab. To find out how to purchase the Gigabit Ethernet PCS IP Core, please contact your local Lattice Sales Office. |