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FFT Compiler

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Overview

IPexpress User Configurable LogoLattice's FFT Compiler offers forward and inverse Fast Fourier Transforms for point sizes from 64 to 16384. This IP core can be configured to perform forward FFT, inverse FFT (IFFT) or port selectable forward/inverse FFT. The FFT compiler offers two choices of implementation: high performance (Streaming I/O) and low resource (Burst I/O). In the high performance implementation, the FFT IP core can perform real-time computations with continuous data streaming in and out at clock rate. There can also be arbitrary gaps between data blocks allowing discontinuous data blocks. The low resource implementation can be used when it is required to use lesser slices (logic unit of Lattice FPGA devices) and EBR (Embedded Block RAM) resources or if the device is too small to accommodate the high performance version.

 


To account for the data growth in fine register length implementations, the FFT compiler allows one of three fixed scaling or dynamic scaling after each radix-2 stage of the FFT computation. The low resource version also supports block floating point arithmetic that provides increased dynamic range for intermediate computations. The FFT compiler also allows the number of FFT points to be varied dynamically through a port.

FFT Compiler

Features

  • Wide range of points sizes: 64, 128, 256, 512, 1024, 2048, 4096, 8192, and 16384
  • Choice of high-performance (streaming I/O) and low resource (burst I/O) versions
  • Run-time variable FFT point size
  • Forward, inverse or port-configurable forward/inverse transform modes
  • Choice of no scaling, fixed scaling (RS111/RS211) and dynamically variable stage-wise scaling
  • Data precision of 8 to 24 bits
  • Twiddle factor precision of 8 to 24 bits
  • Natural order for input and choice of bit-reversed or natural order for output
  • Support for arbitrary gaps between input data blocks in high-performance realization
  • Block floating point scaling support in low resource configurations

Performance and Resource Utilization1

LatticeECP31

# Points

 Operating
mode		 SLICEs LUTs Registers sysMEM
EBRs		 sysDSP
Blocks		 fMAX(MHz)
64 Low Resource 391 669 720 3 2 266
64  High Performance 733 1433 1174 1 2 291
256 Low Resource 431 833 776 3 2 279
256 High Performance 1065 2074 1636 3 3 240
1024  Low Resource 499 968 813 3 2 262
1024 High Performance 1329 2602 2056 6 4 242
8192 Low Resource 554 1089 863 18 2 247
8192 High Performance 1957 3843 2762 21 6 222
1. Performance and utilization characteristics are generated using LFE3-95E-8FN672CES, with Lattice ispLEVER 7.2 SP1 and Synplify 9.6L2 software. When using this IP core in a different density, speed, or grade within the LatticeECP3 family, performance and utilization may vary.

LatticeECP2M1

# Points

 Operating
mode		 SLICEs LUTs Registers sysMEM
EBRs		 sysDSP
Blocks		 fMAX(MHz)
64 Low Resource 392 674 720 3 1 257
64  High Performance 723 1435 1174 1 2 278
256 Low Resource 430 830 776 3 1 282
256 High Performance 1049 2078 1636 3 3 276
1024  Low Resource 489 964 813 3 1 283
1024 High Performance 1324 2626 2056 6 4 273
8192 Low Resource 566 1120 863 18 1 254
8192 High Performance 1952 3880 2762 21
 6 239
1. Performance and utilization characteristics are generated using LFE2M-35E-7F672C, with Lattice ispLEVER 7.2 SP1 and Synplify 9.6L2 software. When using this IP core in a different density, speed, or grade within the LatticeECP2M family, performance and utilization may vary.

LatticeECP21

# Points

 Operating
mode		 SLICEs LUTs Registers sysMEM
EBRs		 sysDSP
Blocks		 fMAX(MHz)
64 Low Resource 374 596 685 3 1 280
64  High Performance 723 1435 1174 1 2 290
256 Low Resource 413 749 741 3 1 251
256 High Performance 1049 2078 1636 3 3 284
1024  Low Resource 447 870 778 3 1 254
1024 High Performance 1324 2626 2056 6 4 251
8192 Low Resource 566 1120 863 18 1 253
8192 High Performance 1952 3880 2762 21 6 258
1. Performance and utilization characteristics are generated using LFE2-50E-7F672C, with Lattice ispLEVER 7.2 SP1 and Synplify 9.6L2 software. When using this IP core in a different density, speed, or grade within the LatticeECP2 family, performance and utilization may vary.

LatticeECP/EC1

# Points

 Operating
mode		 SLICEs LUTs Registers sysMEM
EBRs		 sysDSP
Blocks		 fMAX(MHz)
64 Low Resource 372 569 685 3 1 210
64  High Performance 764 1448 1174 1 2 200
256 Low Resource 424 732 741 3 1 210
256 High Performance 1102 2071 1636 3 3 197
1024  Low Resource 483 914 813 5 1 190
1024 High Performance 1376 2601 2056 7 4 191
8192 Low Resource 557 1076 872 36 1 185
8192 High Performance 2043 3969 2762 38 6 174
1. Performance and utilization characteristics are generated using LFECP33E-5F672C, with Lattice ispLEVER 7.2 SP1 and Synplify 9.6L2 software. When using this IP core in a different density, speed, or grade within the LatticeECP/EC family, performance and utilization may vary.

LatticeXP21

# Points

 Operating
mode		 SLICEs LUTs Registers sysMEM
EBRs		 sysDSP
Blocks		 fMAX(MHz)
64 Low Resource 392 674 720 3 1 245
64  High Performance 723 1435 1174 1 2 271
256 Low Resource 430 830 776 3 1 257
256 High Performance 1049 2078 1636 3 3 253
1024  Low Resource 489 964 813 3 1 240
1024 High Performance 1324 262 2056 6 4 232
1. Performance and utilization characteristics are generated using LFXP2-17E-7F484C, with Lattice ispLEVER 7.2 SP1 and Synplify 9.6L2 software. When using this IP core in a different density, speed, or grade within the LatticeXP2 family, performance and utilization may vary.

Ordering Information

Family Part Numbers
LatticeECP3 FFT-COMP-E3-U2
LatticeECP2M FFT-COMP-PM-U2
LatticeECP2 FFT-COMP-P2-U2
LatticeECP/EC FFT-COMP-E2-U2
LatticeXP2 FFT-COMP-X2-U2

IP Express Version: 2.4
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