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Overview
The Lattice Distributed Arithmetic Finite Impulse Response (DA-FIR) Filter Generator IP implements a highly configurable, multi-channel DA-FIR filter, using distributed arithmetic algorithms implemented in FPGA Look Up Table (LUT) or Embedded Block Memory (EBR) to efficiently support the sum-of-product calculations required to perform the filter function. These techniques generate very area-efficient utilization of the FPGA LUTs while enabling savings of multiply-accumulate blocks (sysDSP) for other design logic. As a result, the DA-FIR Filter Generator IP core is extremely useful for implementing custom DSP blocks in Lattice FPGAs. Please refer to the user's guide to determine which cores are available for each device family. 
Features
- Variable number of taps up to 1024
- Multi-channel support (up to 32 channels)
- Polyphase interpolation/decimation filters
- Halfband filters
- Interpolation and Decimation ratios from 2 to 32
- Input data widths from 4 to 32 bits
- Coefficient widths from 4 to 32 bits
- Signed or unsigned data and coefficients
- Selectable rounding: truncation, rounding away from zero, convergent rounding
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- Optional saturation logic for overflow handling
- Full precision arithmetic
- Specification of fractional inputs and outputs
- Support for both serial and parallel filters, with user specified degree of parallelism.
- Configurable pipelining to increase performance
- Optimizations based on filter characteristics (symmetry and halfband).
- Handshake signals to facilitate smooth interfacing
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Performance and Resource Utilization
LatticeECP31
| Channels |
Taps |
Interpolation |
DWidth |
Round |
SLICEs |
LUTs |
EBRs |
Registers |
Fmax |
|
1
|
16
|
Disable |
16
|
TRUN
|
290 |
348 |
- |
476 |
348 |
|
1
|
9
|
Disable |
8
|
TRUN
|
512 |
611 |
- |
877 |
305 |
|
1
|
36
|
Enable |
12
|
TRUN
|
600 |
714 |
- |
894 |
337 |
1. Performance and utilization characteristics are generated targeting LFE3-70E-7FN484CES using Lattice ispLEVER 7.2 SP1 and Synplify 9.6L1 software. Performance may vary when using a different software version or targeting a different device density or speed grade within the LatticeECP3 family.
LatticeECP2M1
| Channels |
Taps |
Interpolation |
DWidth |
Round |
SLICEs |
LUTs |
EBRs |
Registers |
Fmax |
|
1
|
16
|
Disable |
16
|
TRUN
|
316 |
376 |
- |
481 |
345 |
|
1
|
9
|
Disable |
8
|
TRUN
|
549 |
650 |
- |
887 |
321 |
|
1
|
36
|
Enable |
12
|
TRUN
|
652 |
757 |
- |
918 |
312 |
1. Performance and utilization characteristics are generated targeting LFE2M-20E-6F256C using Lattice ispLEVER 7.2 SP1 and Synplify 9.6L1 software. Performance may vary when using a different software version or targeting a different device density or speed grade within the LatticeECP2M family.
LatticeECP21
| Channels |
Taps |
Interpolation |
DWidth |
Round |
SLICEs |
LUTs |
EBRs |
Registers |
Fmax |
|
1
|
16
|
Disable |
16
|
TRUN
|
316 |
376 |
- |
481 |
349 |
|
1
|
9
|
Disable |
8
|
TRUN
|
549 |
650 |
- |
887 |
300 |
|
1
|
36
|
Enable |
12
|
TRUN
|
652 |
757 |
- |
918 |
316 |
1. Performance and utilization characteristics are generated targeting LFE2-20E-6F256C using Lattice Lattice ispLEVER 7.2 SP1 and Synplify 9.6L1 software. Performance may vary when using a different software version or targeting a different device density or speed grade within the LatticeECP2 family.
LatticeECP/EC1
| Channels |
Taps |
Interpolation
|
DWidth |
Round |
SLICEs |
LUTs |
EBRs |
Registers |
Fmax |
|
1
|
16
|
Disable
|
16
|
TRUN
|
295 |
338 |
- |
481 |
200 |
|
1
|
9
|
Disable
|
8
|
TRUN
|
523 |
592 |
- |
887 |
191 |
|
1
|
36
|
Enable
|
12
|
TRUN
|
624 |
714 |
- |
316 |
182 |
1. Performance and utilization characteristics are generated targeting LFECP15E-4F256C using Lattice ispLEVER 7.2 SP1 and Synplify 9.6L1 software. Performance may vary when using a different software version or targeting a different device density or speed grade within the LatticeECP family.
LatticeSC1
| Channels |
Taps |
Interpolation
|
DWidth |
Round |
SLICEs |
LUTs |
EBRs |
Registers |
Fmax |
|
1
|
16
|
Disable
|
16
|
TRUN
|
278 |
345 |
- |
481 |
390 |
|
1
|
9
|
Disable
|
8
|
TRUN
|
565 |
761 |
- |
895 |
338 |
|
1
|
36
|
Enable
|
12
|
TRUN
|
571 |
668 |
- |
940 |
390 |
1. Performance and utilization characteristics are generated targeting LFSC3GA15E-6F256C using Lattice ispLEVER 7.2 SP1 and Synplify 9.6L1 software. Performance may vary when using a different software version or targeting a different device density or speed grade within the LatticeSC/M family.
LatticeXP21
| Channels |
Taps |
Interpolation
|
DWidth |
Round |
SLICEs |
LUTs |
EBRs |
Registers |
Fmax |
|
1
|
16
|
Disable
|
16
|
TRUN
|
316 |
376 |
- |
481 |
260 |
|
1
|
9
|
Disable
|
8
|
TRUN
|
549 |
650 |
- |
887 |
247 |
|
1
|
36
|
Enable
|
12
|
TRUN
|
652 |
757 |
- |
918 |
255 |
1. Performance and utilization characteristics are generated targeting LFXP2-17E-6Q208C using Lattice ispLEVER 7.2 SP1 and Synplify 9.6L1 software. Performance may vary when using a different software version or targeting a different device density or speed grade within the LatticeXP2 family.
LatticeXP1
| Channels |
Taps |
Interpolation
|
DWidth |
Round |
SLICEs |
LUTs |
EBRs |
Registers |
Fmax |
|
1
|
16
|
Disable
|
16
|
TRUN
|
295 |
338 |
- |
481 |
204 |
|
1
|
9
|
Disable
|
8
|
TRUN
|
523 |
592 |
- |
887 |
170 |
|
1
|
36
|
Enable
|
12
|
TRUN
|
624 |
714 |
- |
918 |
163 |
1. Performance and utilization characteristics are generated targeting LFXP10E-4F256C using Lattice ispLEVER 7.2 SP1 and Synplify 9.6L1 software. Performance may vary when using a different software version or targeting a different device density or speed grade within the LatticeXP family.
Ordering Information
| Family |
Part Number |
| LatticeECP3 |
DAFIR-GEN-E3-U2 |
| LatticeECP2M |
DAFIR-GEN-PM-U2 |
| LatticeECP2 |
DAFIR-GEN-P2-U2 |
| LatticeECP/EC |
DAFIR-GEN-E2-U2 |
| LatticeSC |
DAFIR-GEN-SC-U2 |
| LatticeXP2 |
DAFIR-GEN-X2-U2 |
| LatticeXP |
DAFIR-GEN-XM-U2 |
Evaluate: To download a full evaluation version of this IP, please go to the Lattice IP Server tab in the IPexpress Main Window. All ispLeverCORE IP modules available for download are visible on this tab. Purchase: To find out how to purchase the DA-FIR Filter Generator IP Core, please contact your local Lattice Sales Office.
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