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Helion IONOS Image Signal Processing Intellectual Property Portfolio

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Helion IONOS Suite of IP

Security and Surveillance - Helion IP cores
Example of Helion IONOS Image Signal Processing Pipeline

 

Function Sub-Function IP Core Name (s) Options
Color Pipeline Color Correction CCM Color Correction Matrix Color Correction Matrix
Color Interpolation Color Interpolation, 3x3 Bilinear Simple DeBayer with 3x3
Color Interpolation, 3x3 Smart DeBayer Smart DeBayer with 3x3
Color Interpolation, 5x5 HQ DeBayer High Quality DeBayer with 5x5
Defect-pixel Correction Defect Correction (1D) only monochrome Defect Correction 1D
Defect Correction (2D) color Defect Correction 2D (5x5)
Defect Correction (2D) monochrome Defect Correction 2D (3x3)
Gamma Gamma Correction Gamma Correction channel based
Green balance Green-Channel Balancing Defect Correction Green Channel
Test pattern Test pattern Generator Test pattern Generator
Color Space Conversion & Management n/a Color Separation and Fusion for HDR Operations HDR color model
Color Space Conversion (RGB (4:4:4) ->YCrCb (4:2:2)) RGB -> YCrCb
Color Space Conversion (RGB (4:4:4) ->YUV420P (4:2:0)) + ext. RAM RGB -> YUV420P
Color Space Conversion (YCrCb (4:2:2) -> RGB (4:4:4)) YCrCb -> RGB
Sensor Setup and Control Auto Exposure AE Antiflicker Option Antiflicker
AE Efficient Dynamic Range (EDR) Option for LDR-Fast-AE and HDR-Fast-AE Dynamic Range Enhancement
AE Fast Auto Exposure, LDR-Fast-AE (32 Bit µC + statistics) Base Package
Fast Response for LDR
AE High Dynamic Range Fast Auto Exposure HDR-Fast-AE (MT9V022/V023/V032/V033/M023/M033) (32 Bit µC + statistics) Base Package
Fast Response for HDR
AE Iterative Linear Auto Exposure, LDR-AE Base Package
Slow Iterative Approach
Auto White Balancing AWB Automatic White Balance (32 Bit µC + statistics) Base Package
Linearization (HDR-Modes) HDR Linearization for MI-1000 (MT9M023, MT9M033) Data Linearization for HDR operations
HDR Linearization for MT9V022/023/032/033 Data Linearization for HDR operations
Image Enhancement Noise reduction Adaptive Noise Reduction (+ ext. SRAM) Temporal Noise Removal
Distortion Correction Distortion Correction (+ ext. SRAM) Distortion Correction
Dithering Error Diffusion Dithering 1-Way Color Reduction
Error Diffusion Dithering 2-Way Color Reduction
Aperture Correction Filter Kernel with 3x3 user matrix, e.g. Aperture Correction Filter Kernel
Lens shading Correction LC Lens shading Correction (only Luminance) Lens shading Correction 1 channel
LC Lens shading Correction (RGB) Lens shading Correction 3 channel
Rotation Rotate (+ ext. SRAM) Image Rotation
Scaling Soft scaler Soft Scaler X axis Scaling without external memory
Soft Scaler Y axis Scaling without external memory
Picture improvement & Tone mapping: Wide Dynamic Range HDR / WDR BLENDFEST DRI color (up to 12 bit per color channel) BLENDFEST Color LDR
BLENDFEST DRI monochrome (up to 12 bit input data) BLENDFEST b/w LDR
BLENDFEST HDRI color (up to 24 bit per color channel) BLENDFEST Color HDR
BLENDFEST HDRI monochrome (up to 24 bit input data) BLENDFEST b/w HDR
Gamma Tone mapping Gamma Tone map Luminance, HDR Adaptive Algorithm Especially for EDR use Dynamic Gamma for Luminance
Gamma Tone map Luminance, LDR Adaptive Algorithm Especially for EDR use Dynamic Gamma for Luminance
Gamma Tone map Luminance. HDR (up to 24 Bit Input) Static Gamma for Luminance
Gamma Tone map Luminance. LDR (up to 10 Bit Input) Static Gamma for Luminance
Interfacing APIX APIX RX Interface with Setup ROM APIX RX Interface and
ROM Emulation
APIX TX Interface with Setup ROM APIX TX Interface and
ROM Emulation
Frame rate Converter Frame rate Converter (30fps->60fps + ext. SRAM) Frame rate Converter
I2C interface I2C Fast Frame wise Configurator I2C like Interface for every frame configuration
I2C Slave with 1024 Byte Register map I2C Slave for FPGA side configuration
Sensor interface Image Sensor Setup and Capture Sensor dependent Setup and Interface
available for Aptina MT9
V022/V023/V024
V032/V033/V034
T031 P031 E001 N001 J001 J003
M023 M033
Output Interfaces Output Interface for DVI Transmitter Output formatter for DVI
Output Interface for TFT-Panel Output formatter for TFT Panel
Output Interface with BT1120-Syncs Output formatter for BT1120
Output Interface with BT656-Syncs for video encoder Output formatter for BT656
Output Interface with FIFO for µC or DSP Output formatter for DSP
Wishbone Wishbone I2C Master I2C like master interface
Wishbone I2C Slave with 256 Registers I2C like slave interface
Microcontroller and
Peripherals
  8-bit CPU 8-Bit CPU with Wishbone mapping
32-bit soft CPU MICO32 based, with Helion features
Wishbone Components  
Peripherals Memory Interface DDR1 SDRAM Interface Controller Memory Interface
DDR2 SDRAM Interface Controller Memory Interface
QDR DDR SRAM Interface Controller Memory Interface
SDR SDRAM Interface Controller Memory Interface
Wishbone Wishbone Histogram Statistics 128 tiles EBR based Statistic Engine
Wishbone Histogram Statistics 128 tiles LUT based Statistic Engine
Wishbone Memory block Dual Port Memory
Wishbone Slave Quad in port 4x32 Bit Input Port
Wishbone Slave Quad out port 4x32 Bit Output Port
OSD / Overlay   OSD On Screen Display Character Map (OSD-CM) 2048 Characters (256x8 128x16 64x32 32x64 16x128 8x256) 16x16 Pixel per Character up to 4 OSD-CG (64 up to 256 different Characters) user defined resolution and position Character Map
OSD On Screen Display Character/Symbol Generator (OSD-CG) 16x16 Pixel, 16 Colors (24 Bit per Color) 64 Characters/Symbols user defined Character Generator
Overlay with one graphical object selectable color, transparency and dimension Bitmap
Embedded Data   Parameter Inserting (selectable) Data Insertion into image stream


 

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