Exor Sitek Cores

Display Controller Suite

Exor-Sitek offers eleven IP cores that can be used for a variety of functions for use with the LCD-Pro Evaluation Kit. 

The library offers simplified system and host interfacing with the use of the industry standard AMBA® bus architecture and included system interface cores. The cores, which are configurable with various implementation options available, offer a high degree of solution scalability. Additionally, the cores are designed and optimized for high speed required in state-of-the-art graphics systems, providing simplified timing closure and short development time.

Exor Sitek IP Library

LCD-Pro IP	Description	LCD-Pro Suite 1: Base Video Controller (BVC)	LCD-Pro Suite 2: BVC +2D Accelerator	LCD-Pro Suite 3: BVC +2D Accelerator +Video Input IP
UltiEVC Video Controller	Advanced flat panel display controller
UltiEMC Memory Controller	Low slice cost, high bandwidth, DDR memory controller
UltiADDA	FPGA based AD/DA/touch screen controller (coupled with external analog circuitry). These cores are supported by a reliable and efficient set of system IP
UltiAHB_I	AMBA 3 AHB™ multi-layer switch matrix interconnect
UltiAPB_B	AMBA 3 AHB™ to APB™ bridge
UltiSPI_M	SPI master controller
UltiSPI_S	SPI slave core providing AMBA® bus access to external host
UltiI2C_M	I2C master controller
UltiUSBDMA	USB to AMBA® AHB™ interface - versatile test and debug link
UltiEBB 2D Graphics Accelerator	Advanced BITBLT core providing ROP and Alpha blending operations
UltiVIDIN Video Input	Advanced video input/frame grabber core

The library allows easy integration of advanced FPGA-based graphics systems with powerful features:

• Ability to control of a wide range of flat panel displays ranging from low end CIF and QVGA up to high definition TFT, in 8, 16 or 24 bit color (fi led proven with more than 30 commercially available displays)
• Multi-layer image compositing available in display controller, supporting simple overlaying, color keyed transparency, alpha blending and alpha masking
• Variable layer color depth, size, positioning, memory geometry and location, smooth scrolling
• Display refresh synchronization
• Support for fast hardware BITBLT operations with standard ROP or Alpha composition
• Support for 8,16, 24 and 32 bit bitmap formatting, variable and independent memory geometry for source and destination bitmaps
• Powerful alpha blending operations supporting the Porter-Duff alpha composition rules.
• Solid and Pattern fill operations
• Hardware color expansion of monochromatic bitmaps, color channel mixing support.
• Versatile video input allowing multiple video input channels with multiple input muxing, supporting ITU-R BT.656 (ITU656) or Digital RGB video inputs
• Real-time down-scaling of input video stream
• Variable video image memory geometry, cropping and positioning
• Frame grabbing, video input signal synchronization
• High bandwidth DDR frame buffer memory support
• FPGA-based AD/DA controller employing external analog circuitry.
• Touch sensing, Backlight and dimming control
• Control of embedded peripheral memories over SPI and I2C buses.
• System interfacing over peripheral SPI bus or via USB link from an external USB host

Ordering Part Number

Evaluate: The IP is available in Windows platform only. The IP ("Display Controller Suite") download from IP Express includes all the IP cores listed in the table above. Some or all the cores can be selected during the installation process.
Purchase: To purchase one of the 3 suites, please contact your local Lattice Sales Representative.

To learn more about solutions using this IP and download related tutorials and software, visit the LCD-Pro Evaluation Kit page.