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The Art of Silicon Color JPEG encoder supports high speed baseline progressive JPEG encode. It is available with predefined tables (as suggested by ISO/IEC 10918-1) or may alternatively be configured via a microprocessor interface.
All internal state is clocked from a single clock input. A synchronous reset is provided. Clock and reset senses are configurable.
The following are typical performance and utilization results.
| Device | Frequency | SLICEs | Block RAMs | sysDSP Blocks |
|---|---|---|---|---|
|
ECP2 |
90 |
2148 |
5 |
2 |
|
SC |
115 |
2702 |
5 |
- |
|
XP |
45 |
2726 |
5 |
- |