LatticeXP2 Low-Cost Non-Volatile FPGA

The LatticeXP2 flexiFLASH architecture combines a Look-Up Table (LUT) based FPGA fabric with Flash non-volatile cells. The flexiFLASH approach provides benefits such as instant-on, small footprint, on-chip storage with FlashBAK embedded block memories and Serial TAG memory and design security. The family also supports Live Updates with TransFR, 128-bit AES Encryption and Dual-Boot technologies. The LatticeXP2 FPGA fabric utilizes an underlying LatticeECP2 architecture that was optimized from the outset with high performance and low cost in mind. The LatticeXP2 devices include LUT-based logic, distributed and embedded memory, Phase Locked Loops (PLLs), pre-engineered source synchronous I/O and enhanced sysDSP blocks.

• LatticeXP2 Family Handbook (PDF, 8.2 MB)

Key Features

• Optimized FPGA Architecture for Low Cost Non-Volatile Applications
  • Feature set optimized for high-volume, low-cost applications
  • Low cost csBGA, TQFP, PQFP and BGA packaging
  • Densities from 5K to 40K four input lookup tables (LUTs) 
• flexiFLASH Architecture
  • Instant-on
  • Small footprint 
  • Single chip
  • FlashBAK™ technology
  • Serial TAG memory
  • Design security
• Live Update Technology
  • TransFR™ technology
  • Secure updates with 128 bit AES encryption
  • Dual Boot
• sysDSP Block
  • Three to eight blocks for high performance multiply, accumulate
  • 12 to 32 18X18 multipliers
  • Each block supports one 36X36 multiplier or four 18X18 or eight 9X9 multipliers
• Pre-Engineered Source Synchronous I/O
  • DDR / DDR2 interfaces up to 200 MHz
  • 7:1 LVDS interfaces support display applications up to 600Mbps
  • XGMII 
• LatticeCORE Intellectual Property
  • Speed up your design cycle with LatticeCORE Intellectual Property 
• Diamond Design Tools
  • Easy to use SW package supports Lattice FPGA and programmable logic devices
• LatticeXP2 Applications
  • LatticeXP2 devices are ideal for a variety of applications in cost sensitive markets such as Consumer, Automotive, Medical & Industrial, Networking and Computing
• Available in Commercial, Industrial, and AEC-Q100 Qualified Automotive Temperature Ranges

LatticeXP2 Device Table

Device	XP2-5	XP2-8	XP2-17	XP2-30	XP2-40
LUTs (K)	5	8	17	29	40
Distributed RAM (Kbits)	10	18	35	56	83
EBR SRAM (Kbits)	166	221	276	387	885
EBR SRAM Blocks	9	12	15	21	48
sysDSP Blocks	3	4	5	7	8
18x18 Multipliers	12	16	20	28	32
PLL	2	2	4	4	4
Maximum Available I/O	172	201	358	472	540
Packages	I/O Count
132-pin csBGA (8 x 8 mm)	86	86
144-pin TQFP (20 x 20 mm)	100	100
208-pin PQFP (28 x 28 mm)	146	146	146
256-ball ftBGA (17 x 17 mm)	172	201	201	201
484-ball fpBGA (23 x 23 mm)			358	363	363
672-ball fpBGA (27 x 27 mm)				472	540

LatticeXP2 Development Boards and Kits

Development Boards and Kits are available to help you evaluate the LatticeXP2 technology, or aid in the development of your own design. Each board includes example designs, schematics and other resources to help you accelerate the evaluation and development process.