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Instant-On FPGA Solutions: ispXPGA


Lattice ispXPGAThe ispXPGA family of FPGA devices allows the creation of high-performance logic designs that are both non-volatile and infinitely re-configurable. Other FPGA solutions force a compromise, being either re-programmable, or reconfigurable, or non-volatile. This FPGA family offers all of these capabilities with a mainstream architecture containing the features required for today's system-level design.

The ispXPGA FPGA family is available in two options. The standard device supports sysHSI capability for ultra fast serial communications and the "E-Series", a high-performance, low-cost FPGA device with no sysHSI functionality.

ispXPGA FPGA Product Selector Guide
Family Member System Gates (K) LUT-4 Logic FFs
(K)
Block RAM
(K)
Distributed RAM (K) sysHSI Channels* User
I/O
Packaging
ispXPGA 125/E 139 1,936 3.8 92 30 4 160
176
256 fpBGA
516 fpBGA
ispXPGA 200/E 210 2,704 5.4 111 43 8 160
208
256 fpBGA
516 fpBGA
ispXPGA 500/E 476 7,056 14.1 184 112 12 336
336
516 fpBGA
900 fpBGA
ispXPGA 1200/E 1,250 15,376 30.7 414 246 20 496
496
680 fpSBGA
900 fpBGA

Note: 8 PLLs with global clocks and low-skew clock nets per device.
* "E-Series" does not support sysHSI.

Features

  • New ispXP (eXpanded Programmability): Non-Volatile, Infinitely Reconfigurable
    • Power-up in Microseconds via On-Chip E2 Cells for Instant-on Usage
    • Reconfigure SRAM-based FPGA Logic in Milliseconds
    • In-System Programmable
    • No External Configuration Memory Needed for FPGA Configuration
  • System-Level Integration
    • 139K to 1.25M System Gates
    • Up to 496 I/Os
    • Up to 414Kb Embedded Memory
  • Two Options Available
    • High-performance sysHSITM (Standard part number)
    • Low-cost, no sysHSI ("E-Series" part number)
  • sysHSI SERDES for up to 800Mbps Serial Communications
  • High Performance Logic Blocks (PFUs)
  • Block and Distributed Memory
  • Variable-Length Interconnect Routing
  • sysCLOCKTM PLLs for Clock Management
  • sysIOTM for High Performance Interfacing
  • 1.8V, 2.5V, and 3.3V Operation

ispXPGA Programming/Configuration

  • Auto-configure FPGA at Power-up in µSec
  • Reconfigure FPGA In-System in mSec
  • Reprogram FPGA During System Operation
  • Configure from On-Chip E2 or CPU
  • Set Security Bits to Prevent Readback
  • No External Configuration Memory

ispXPGA FPGA Evaluation Boards

The ispXPGA Evaluation Board is a complete hardware kit that allows the user to program, evaluate, and de-bug a design for the Lattice ispXPGA architecture.

View the ispXPGA Evaluation Board webpage.

For information regarding ispLEVER software, supporting ispXPGA and ispXPLD device design, contact your local Lattice field sales representative.

The World's First FPGA to Offer Non-Volatility and Reconfigurability